HD6433935 Hitachi, HD6433935 Datasheet - Page 217

• Manufacturer Part Number: HD6433935
• Description: 8-Bit MICROCONTROLLER
• Manufacturer: Hitachi

Bit 2: Compare match flag L (CMFL)
Bit 2 is a status flag indicating that TCFL has matched OCRFL. This flag is set by hardware and
cleared by software. It cannot be set by software.
Bit 2
CMFL
0
1
Bit 1: Timer overflow interrupt enable L (OVIEL)
Bit 1 selects enabling or disabling of interrupt generation when TCFL overflows.
Bit 1
OVIEL
0
1
Bit 0: Counter clear L (CCLRL)
Bit 0 selects whether TCFL is cleared when TCFL and OCRFL match.
Bit 0
CCLRL
0
1
5. Clock stop register 1 (CKSTPR1)
Bit
Initial value
Read/Write
CKSTPR1 is an 8-bit read/write register that performs module standby mode control for peripheral
modules. Only the bit relating to timer F is described here. For details of the other bits, see the
sections on the relevant modules.
Description
Clearing conditions:
After reading CMFL = 1, cleared by writing 0 to CMFL
Setting conditions:
Set when the TCFL value matches the OCRFL value
Description
TCFL overflow interrupt request is disabled
TCFL overflow interrupt request is enabled
Description
TCFL clearing by compare match is disabled
TCFL clearing by compare match is enabled
S1CKSTP S31CKSTP S32CKSTP ADCKSTP TGCKSTP TFCKSTP TCCKSTP TACKSTP
R/W
7
1
R/W
6
1
R/W
5
1
R/W
4
1
R/W
3
1
R/W
2
1
R/W
1
1
(initial value)
(initial value)
(initial value)
R/W
0
1
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