P89V51RD2 Philips Semiconductors, P89V51RD2 Datasheet - Page 27

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P89V51RD2

Manufacturer Part Number
P89V51RD2
Description
8-bit 80C51 5 V low power 64 kB Flash microcontroller with 1 kB RAM
Manufacturer
Philips Semiconductors
Datasheet

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9397 750 12964
Product data
7.3.2 Mode 1
7.3.3 Mode 2
In this mode, the Timer register is configured as a 13-bit register. As the count rolls
over from all 1s to all 0s, it sets the Timer interrupt flag TFn. The count input is
enabled to the Timer when TRn =
GATE =
width measurements). TRn is a control bit in the Special Function Register TCON
(Figure
The 13-bit register consists of all 8 bits of THn and the lower 5 bits of TLn. The upper
3 bits of TLn are indeterminate and should be ignored. Setting the run flag (TRn)
does not clear the registers.
Mode 0 operation is the same for Timer 0 and Timer 1 (see
different GATE bits, one for Timer 1 (TMOD.7) and one for Timer 0 (TMOD.3).
Mode 1 is the same as Mode 0, except that all 16 bits of the timer register (THn and
TLn) are used. See
Mode 2 configures the Timer register as an 8-bit Counter (TLn) with automatic reload,
as shown in
the contents of THn, which must be preset by software. The reload leaves THn
unchanged. Mode 2 operation is the same for Timer 0 and Timer 1.
Fig 7. Timer/Counter 0 or 1 in Mode 0 (13-bit counter).
Fig 8. Timer/Counter 0 or 1 in Mode 1 (16-bit counter).
INTn Pin
INTn Pin
TnGate
TnGate
Tn pin
Tn pin
Osc/6
Osc/6
TRn
TRn
6). The GATE bit is in the TMOD register.
1
allows the Timer to be controlled by external input INTn, to facilitate pulse
Figure
Rev. 01 — 01 March 2004
9. Overflow from TLn not only sets TFn, but also reloads TLn with
Figure
C/T = 0
C/T = 1
C/T = 0
C/T = 1
8.
1
and either GATE = 0 or INTn =
control
control
8-bit microcontrollers with 80C51 core
(8-bits)
(5-bits)
TLn
TLn
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
(8-bits)
(8-bits)
THn
THn
P89V51RD2
Figure
overflow
overflow
7). There are two
1
. (Setting
TFn
TFn
002aaa519
002aaa520
interrupt
interrupt
27 of 75

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