P89V51RD2 Philips Semiconductors, P89V51RD2 Datasheet - Page 43

• Manufacturer Part Number: P89V51RD2
• Description: 8-bit 80C51 5 V low power 64 kB Flash microcontroller with 1 kB RAM
• Manufacturer: Philips Semiconductors

Philips Semiconductors
9397 750 12964
Product data
Fig 19. Block diagram of programmable Watchdog timer
external RST
7.8 Programmable Counter Array (PCA)
CLK (XTAL1)
where WDTD is the value loaded into the WDTD register and f
frequency.
Table 33:
Bit addressable; Reset value: 00H
Table 34:
The PCA includes a special 16-bit Timer that has five 16-bit capture/compare
modules associated with it. Each of the modules can be programmed to operate in
one of four modes: rising and/or falling edge capture, software timer, high-speed
output, or pulse width modulator. Each module has a pin associated with it in port 1.
Module 0 is connected to P1.3 (CEX0), module 1 to P1.4 (CEX1), etc. Registers CH
and CL contain current value of the free running up counting 16-bit PCA timer. The
PCA timer is a common time base for all five modules and can be programmed to run
at:
input on the ECI pin (P1.2). The timer count source is determined from the CPS1 and
CPS0 bits in the CMOD SFR (see
Bit
7 to 5
4
3
2
1
0
Bit
Symbol
Period = (255
1
WDTC
6
the oscillator frequency,
COUNTER
WDTC - Watchdog control register (address COH) bit allocation
WDTC - Watchdog control register (address COH) bit description
Symbol
-
WDOUT
WDRE
WDTS
WDT
SWDT
7
-
WDTD)
Rev. 01 — 01 March 2004
344064
clks
6
-
Description
Reserved for future use. Should be set to
Watchdog output enable. When this bit and WDRE are both set, a
Watchdog reset will drive the reset pin active for 32 clocks.
Watchdog timer reset enable. When set enables a Watchdog timer
reset.
Watchdog timer reset flag, when set indicates that a WDT reset
occurred. Reset in software.
Watchdog timer refresh. Set by software to force a WDT reset.
Start Watchdog timer, when set starts the WDT. When cleared,
stops the WDT.
UPPER BYTE
344064
WDTD
WDT
1
5
2
-
the oscillator frequency, the Timer 0 overflow, or the
Table 35
WDOUT
1/f
WDT reset
CLK (XTAL1)
4
and
8-bit microcontrollers with 80C51 core
002aaa531
Table
WDRE
3
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
36).
internal reset
WDTS
P89V51RD2
2
‘0’
osc
by user programs.
is the oscillator
WDT
1
SWDT
43 of 75
0