P89V51RD2 Philips Semiconductors, P89V51RD2 Datasheet - Page 40

• Manufacturer Part Number: P89V51RD2
• Description: 8-bit 80C51 5 V low power 64 kB Flash microcontroller with 1 kB RAM
• Manufacturer: Philips Semiconductors

Philips Semiconductors
9397 750 12964
Product data
Fig 16. SPI master-slave interconnection.
Clock Generator
7.6.2 SPI description
SPI
The serial peripheral interface (SPI) allows high-speed synchronous data transfer
between the P89V51RD2 and peripheral devices or between several P89V51RD2
devices.
devices. The SCK pin is the clock output and input for the master and slave modes,
respectively. The SPI clock generator will start following a write to the master devices
SPI data register. The written data is then shifted out of the MOSI pin on the master
device into the MOSI pin of the slave device. Following a complete transmission of
one byte of data, the SPI clock generator is stopped and the SPIF flag is set. An SPI
interrupt request will be generated if the SPI Interrupt Enable bit (SPIE) and the Serial
Port Interrupt Enable bit (ES) are both set.
An external master drives the Slave Select input pin, SS/P1[4], low to select the SPI
module as a slave. If SS/P1[4] has not been driven low, then the slave SPI unit is not
active and the MOSI/P1[5] port can also be used as an input port pin.
CPHA and CPOL control the phase and polarity of the SPI clock.
Figure 18
Table 28:
Bit addressable; Reset source(s): any reset; Reset value: 00000000B
•
•
•
•
•
Bit
Symbol
LSB first or MSB first data transfer
Four programmable bit rates
End of transmission (SPIF)
Write collision flag protection (WCOL)
Wake-up from idle mode (slave mode only)
MSB Master LSB
8-bit Shift Register
Figure 16
show the four possible combinations of these two bits.
SPCR - SPI control register (address D5H) bit allocation
SPIE
7
Rev. 01 — 01 March 2004
shows the correspondence between master and slave SPI
SPE
6
SCK
MISO
MOSI
SS
V DD
DORD
5
V SS
MISO
MOSI
SCK
SS
MSTR
4
8-bit microcontrollers with 80C51 core
CPOL
8-bit Shift Register
MSB Slave LSB
3
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
CPHA
P89V51RD2
2
Figure 17
002aaa528
SPR1
1
and
SPR0
40 of 75
0