P89V51RD2 Philips Semiconductors, P89V51RD2 Datasheet - Page 37

• Manufacturer Part Number: P89V51RD2
• Description: 8-bit 80C51 5 V low power 64 kB Flash microcontroller with 1 kB RAM
• Manufacturer: Philips Semiconductors

Philips Semiconductors
9397 750 12964
Product data
7.5.7 More about UART modes 2 and 3
7.5.8 Multiprocessor communications
The 16 states of the counter divide each bit time into 16ths. At the 7th, 8th, and 9th
counter states of each bit time, the bit detector samples the value of RxD. The value
accepted is the value that was seen in at least 2 of the 3 samples. This is done for
noise rejection. If the value accepted during the first bit time is not 0, the receive
circuits are reset and the unit goes back to looking for another 1-to-0 transition. This
is to provide rejection of false start bits. If the start bit proves valid, it is shifted into the
input shift register, and reception of the rest of the frame will proceed.
The signal to load SBUF and RB8, and to set RI, will be generated if, and only if, the
following conditions are met at the time the final shift pulse is generated: (a) RI = 0,
and (b) Either SM2 = 0, or the received stop bit =
If either of these two conditions is not met, the received frame is irretrievably lost. If
both conditions are met, the stop bit goes into RB8, the 8 data bits go into SBUF, and
RI is activated.
Reception is performed in the same manner as in mode 1.
The signal to load SBUF and RB8, and to set RI, will be generated if, and only if, the
following conditions are met at the time the final shift pulse is generated: (a) RI = 0,
and (b) Either SM2 = 0, or the received 9th data bit =
If either of these conditions is not met, the received frame is irretrievably lost, and RI
is not set. If both conditions are met, the received 9th data bit goes into RB8, and the
first 8 data bits go into SBUF.
UART modes 2 and 3 have a special provision for multiprocessor communications. In
these modes, 9 data bits are received or transmitted. When data is received, the 9th
bit is stored in RB8. The UART can be programmed so that when the stop bit is
received, the serial port interrupt will be activated only if RB8 =
enabled by setting bit SM2 in SCON. One way to use this feature in multiprocessor
systems is as follows:
When the master processor wants to transmit a block of data to one of several slaves,
it first sends out an address byte which identifies the target slave. An address byte
differs from a data byte in a way that the 9th bit is
data byte. With SM2 = 1, no slave will be interrupted by a data byte, i.e. the received
9th bit is ‘0’. However, an address byte having the 9th bit set to
slaves, so that each slave can examine the received byte and see if it is being
addressed or not. The addressed slave will clear its SM2 bit and prepare to receive
the data (still 9 bits long) that follow. The slaves that weren’t being addressed leave
their SM2 bits set and go on about their business, ignoring the subsequent data
bytes.
SM2 has no effect in Mode 0, and in Mode 1 can be used to check the validity of the
stop bit, although this is better done with the Framing Error flag. When UART receives
data in mode 1 and SM2 =
stop bit is received.
Rev. 01 — 01 March 2004
1
, the receive interrupt will not be activated unless a valid
8-bit microcontrollers with 80C51 core
1
‘1’
.
in an address byte and ‘0’ in the
1.
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
P89V51RD2
‘1’
1
. This feature is
will interrupt all
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