MC9S08GB32 Motorola, MC9S08GB32 Datasheet - Page 115

• Manufacturer Part Number: MC9S08GB32
• Description: Microcontrollers
• Manufacturer: Motorola

The clock scheme will be FLL engaged, internal (FEI). So
Solving for N / R gives:
A trim procedure will be required to hone the frequency to exactly 5.4 MHz. An example of the trim
procedure is shown in example #4.
The values needed in each register to set up the desired operation are:
ICGC1 = $28 (%00101000)
ICGC2 = $31 (%00110001)
ICGS1 = $xx
ICGS2 = $xx
ICGFLTLU/L = $xx
ICGTRM = $xx
Freescale Semiconductor
Bit 7
Bit 6
Bit 5
Bits 4:3 CLKS
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6:4 MFD
Bit 3
Bit 2:0 RFD
This is read only except for clearing interrupt flag
This is read only; good idea to read this before performing time critical operations
Not used in this example
Bit 7:0 TRIM
N / R = 10.8 MHz /(243/7 kHz * 64) = 4.86 ; We can choose N = 10 and R = 2.
RANGE
REFS
OSCSTEN 0
LOLRE
LOCRE
f
ICGOUT
0
0
1
01
0
0
0
011 Sets the MFD multiplication factor to 10
0
001 Sets the RFD division factor to ÷2
= (f
Unimplemented or reserved, always reads zero
Configures oscillator for low-frequency range; (don’t care)
Oscillator using crystal or resonator requested (don’t care)
FLL engaged, internal reference clock mode
Disables the oscillator in stop modes
Reserved for Freescale Semiconductor internal use; always write zero
Unimplemented or reserved, always reads zero
Generates an interrupt request on loss of lock
Generates an interrupt request on loss of clock
Only need to write when trimming internal oscillator; done in separate
operation (see example #4)
IRG
MC9S08GB/GT Data Sheet, Rev. 2.3
/ 7) * P * N / R ; P = 64, f
IRG
= 243 kHz
Initialization/Application Information
Eqn. 7-5
Eqn. 7-6
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