MC9S08GB32 Motorola, MC9S08GB32 Datasheet - Page 189

• Manufacturer Part Number: MC9S08GB32
• Description: Microcontrollers
• Manufacturer: Motorola

12.1
Features of the SPI module include:
12.2
This section includes block diagrams showing SPI system connections, the internal organization of the SPI
module, and the SPI clock dividers that control the master mode bit rate.
12.2.1
Figure 12-2
device initiates all SPI data transfers. During a transfer, the master shifts data out (on the MOSI1 pin) to
the slave while simultaneously shifting data in (on the MISO1 pin) from the slave. The transfer effectively
exchanges the data that was in the SPI shift registers of the two SPI systems. The SPSCK1 signal is a clock
output from the master and an input to the slave. The slave device must be selected by a low level on the
slave select input (SS1 pin). In this system, the master device has configured its SS1 pin as an optional
slave select output.
Freescale Semiconductor
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Master or slave mode operation
Full-duplex or single-wire bidirectional option
Programmable transmit bit rate
Double-buffered transmit and receive
Serial clock phase and polarity options
Slave select output
Selectable MSB-first or LSB-first shifting
7
Features
Block Diagrams
SPI System Block Diagram
6
shows the SPI modules of two MCUs connected in a master-slave arrangement. The master
5
GENERATOR
SPI SHIFTER
MASTER
CLOCK
4
3
2
1
0
Figure 12-2. SPI System Connections
MC9S08GB/GT Data Sheet, Rev. 2.3
MOSI1
MISO1
SPSCK1
SS1
SPSCK1
MOSI1
MISO1
SS1
7
SLAVE
6
5
SPI SHIFTER
4
3
2
1
0
Features
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