K7D801871B-HC30 Samsung semiconductor, K7D801871B-HC30 Datasheet - Page 11

• Manufacturer Part Number: K7D801871B-HC30
• Description: 256Kx36 & 512Kx18 SRAM
• Manufacturer: Samsung semiconductor

K7D803671B
K7D801871B
K
K
B1
B2
B3
SA
G
DQ
CQ
CQ
Q
t
X2
1
NOP
CHQZ
NOTE
1. Q
2. Outputs are disabled(High-Z) one clock cycle after NOP detected or after no pending data requests are present.
3. Doing more than one Read Continue or Write Continue will cause the address to wrap around.
t
BVKH
t
AVKH
01
refers to output from address A. Q
READ
(burst of 4)
A
2
t
TIMING WAVEFORMS FOR DOUBLE DATA RATE CYCLES
0
KXCH
t
KHKH
t
t
KHBX
KHAX
t
CHQV
t
CHLZ
READ
CONTINUE
3
Q
01
READ
(burst of 4)
A
4
Q
5
02
02
Q
t
CHQX
03
refers to output from the next internal burst address following A, etc.
READ
CONTINUE
5
Q
(Burst Length=4, 2)
04
Q
51
A
READ
(burst of 2)
6
1
Q
52
- 11
Q
53
NOP
7
Q
54
Q
t
GHQX
11
NOP
8
Q
12
256Kx36 & 512Kx18 SRAM
t
GHQZ
(burst of 4)
WRITE
9
A
2
t
KHDX
t
DVKH
10
D
WRITE
CONTINUE
21
DON’ T CARE
D
22
11
A
D
3
23
READ
(burst of 4)
t
t
GLQV
D
GLQX
24
January. 2002
UNDEFINED
12
READ
CONTINUE
Rev 4.0
Q
31