AM29SL400DB90 SPANSION [SPANSION], AM29SL400DB90 Datasheet
AM29SL400DB90
Related parts for AM29SL400DB90
AM29SL400DB90 Summary of contents
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Data Sheet July 2003 The following document specifies Spansion memory products that are now offered by both Advanced Micro Devices and Fujitsu. Although the document is marked with the name of the company that orig- inally developed the specification, these ...
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ADVANCE INFORMATION Am29SL400D 4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory DISTINCTIVE CHARACTERISTICS Single power supply operation — 1.65 to 1.95 V for read, program, and erase operations — Ideal for ...
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GENERAL DESCRIPTION The Am29SL400D is an 4Mbit, 1.8 V volt-only Flash memory organized as 524,288 bytes or 262,144 words. The device is offered in a 48-ball FBGA package. The word-wide data (x16) appears ...
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TABLE OF CONTENTS Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4 Block Diagram . . . ...
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PRODUCT SELECTOR GUIDE Family Part Number Speed Options Standard Voltage Range V Max access time ACC Max CE# access time Max OE# access time ...
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CONNECTION DIAGRAM A6 B6 A13 A12 WE# RESET RY/BY A17 Special Handling Instructions for FBGA Packages Special ...
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PIN CONFIGURATION A0–A17 = 18 addresses DQ0–DQ14 = 15 data inputs/outputs DQ15/A-1 = DQ15 (data input/output, word mode), A-1 (LSB address input, byte mode) BYTE# = Selects 8-bit or 16-bit mode CE# = ...
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... E DEVICE NUMBER/DESCRIPTION Am29SL400D 4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS Flash Memory 1.8 Volt-only Read, Program, and Erase Valid Combinations for FBGA Packages Order Number Package Marking AM29SL400DT90, A400DT90V, AM29SL400DB90 A400DB90V WAC, AM29SL400DT100, WAI, A400DT10V, AM29SL400DB100 WAD, A400DB10V WAF AM29SL400DT120, A400DT12V, ...
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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory ...
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See “ Reading Array Data, on page 13 for more infor- mation. Refer to the AC Read Operations table for timing specifications and to Figure 13, on page 26 the timing diagram. I ...
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The RESET# pin may be tied to the system reset cir- cuitry. A system reset would thus also reset the Flash memory, enabling the system to read the boot-up firm- ware from the ...
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Autoselect Mode The autoselect mode provides manufacturer and device identification, and sector protection verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equipment to automatically match a device ...
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START PLSCNT = 1 RESET Wait 1 µs No First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes Set up sector address Sector Protect: Write 60h to sector address ...
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START RESET Perform Erase or Program Operations RESET Temporary Sector Unprotect Completed (Note 2) Notes: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. ...
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before erasing begins. This resets the device to reading array data. Once erasure begins, however, the device ignores reset commands until the operation is com- plete. The reset command may be written between ...
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Operations, on page 29 for parameters, and to Figure 17, on page 30 for timing diagrams. Write Program Command Sequence Data Poll from System Embedded Program algorithm in progress Verify Data? No Increment ...
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Once the sector erase operation has begun, only the Erase Suspend command is valid. All other commands are ignored. Note that a hardware reset during the sector erase operation immediately terminates the operation. ...
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Command Definitions Table 5. Am29SL400D Command Definitions Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word ...
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Write Operation Status The device provides several bits to determine the status of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7, and RY/BY#. Table 6 on page 21 and the following subsec- tions ...
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the output is low (Busy), the device is actively erasing or programming. (This includes programming in the Erase Suspend mode.) If the output is high (Ready), the device is ready to read ...
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other system tasks. In this case, the system must start at the beginning of the algorithm when it returns to determine the status of the operation (top of Figure 6). START Read DQ7–DQ0 ...
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Operation Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Reading within Erase Suspended Sector Erase Suspend Reading within Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ5 switches to ‘1’ when an Embedded Program ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . –65 ° +150 ° C Ambient Temperature with Power ...
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CHARACTERISTICS CMOS Compatible Parameter Description I Input Load Current Input Load Current LIT I Output Leakage Current LO V Active Read Current CC I CC1 (Notes ...
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CHARACTERISTICS (Continued) Zero Power Flash 500 1000 Note: Addresses are switching at 1 MHz Figure 9. I Current vs. Time (Showing Active and Automatic Sleep Currents) ...
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TEST CONDITIONS Device Under Test C L Figure 11. Test Setup Key to Switching Waveforms WAVEFORM Don’t Care, Any Change Permitted 2.0 V 1.0 V Input 0.0 V Figure 12. Input Waveforms and ...
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CHARACTERISTICS Read Operations Parameter JEDEC Std Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV ...
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CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std Description RESET# Pin Low (During Embedded t READY Algorithms) to Read or Write (See Note) RESET# Pin Low (NOT During Embedded t READY Algorithms) to ...
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CHARACTERISTICS Word/Byte Configuration (BYTE#) Parameter JEDEC Std CE# to BYTE# Switching Low or High ELFL/ ELFH t BYTE# Switching Low to Output HIGH Z FLQZ t BYTE# Switching High to ...
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CHARACTERISTICS Erase/Program Operations Parameter JEDEC Std Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data ...
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CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE Data RY/BY VCS Notes program address, ...
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CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE Data 55h RY/BY# t VCS V CC Notes sector ...
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CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ0–DQ6 t BUSY RY/BY# Note Valid address. Illustration shows first status ...
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CHARACTERISTICS Enter Erase Embedded Suspend Erasing Erase Erase Suspend WE# DQ6 DQ2 Note: The system may use CE# or OE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an ...
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CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Protect/Unprotect Data 60h 1 µs CE# WE# OE# * For sector protect ...
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CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVEL Address Hold Time ELAX ...
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CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes program address program data, ...
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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Byte Programming Time Word Programming Time Byte Mode Chip Programming Time (Note 3) Word Mode Notes: 1. Typical program and erase times ...
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PHYSICAL DIMENSIONS FBA048—48-Ball Fine-Pitch Ball Grid Array (FBGA Package Am29SL400D Dwg rev AF; 10/99 Rev. A Amend. ...
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REVISION SUMMARY Revision A (February 12, 2004) Initial release. Revision A+1 (April 13, 2005) Ordering Information Added Commercial and Industrial Pb-free options. Colophon The products described in this document are designed, developed and ...