CYIL1SM0300AA CYPRESS [Cypress Semiconductor], CYIL1SM0300AA Datasheet - Page 22

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CYIL1SM0300AA

Manufacturer Part Number
CYIL1SM0300AA
Description
LUPA-300 CMOS Image Sensor
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Document Number: 001-00371 Rev. *D
The line counter starts with the value 1 immediately after the
rising edge of RESET_N and after the end of the FOT. This
means that 4 integration timing registers above need to be
upload with the desired number of lines plus one.
In subsampling mode the line counter increases with steps of
2. In this mode the counter starts with the value 2 immediately
with the rising edge of RESET_N. This means that for correct
operation, the 4 integration timing registers can only be
uploaded with an even number of lines if subsampling is
enabled.
RESET_N
READOUT
SAMPLE
RESET
# LINES
PIXEL
PIXEL
1
Res1_length
Figure 14. Integration Timing in mastermode
Res2_timer
The length of the integration time, the DS integration time and
the TS integration time are indicated by 3 output pins:
INT_TIME_1, INT_TIME_2 and INT_TIME_3. These outputs
are high during the actual integration time. This is from the
falling edge of the corresponding reset pulse to the falling edge
of the internal pixel sample. Figure 15 illustrates this. The
internal pixel sample rises at the moment defined by
FT_TIMER (see Figure 14) and the length of the pulse is
4*(12*(GRAN<1:0>+1)+2).
Res3_timer
FT_timer
FOT
CYIL1SM0300AA
1
Res1_length
Page 22 of 36
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