AM79C970AKCW AMD [Advanced Micro Devices], AM79C970AKCW Datasheet - Page 171

• Manufacturer Part Number: AM79C970AKCW
• Description: PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
• Manufacturer: AMD [Advanced Micro Devices]

Control and Status Registers (continued)
RAP Addr
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
Symbol
CSR38
CSR39
CSR40
CSR41
CSR42
CSR43
CSR44
CSR45
CSR46
CSR47
CSR48
CSR49
CSR50
CSR51
CSR52
CSR53
CSR54
CSR55
CSR56
CSR57
CSR58
CSR59
CSR60
CSR61
CSR62
CSR63
CSR64
CSR65
CSR66
CSR67
CSR68
CSR69
CSR70
CSR71
CSR72
CSR73
CSR74
CSR75
CSR76
CSR77
CSR78
CSR79
CSR80
CSR81
CSR82
Default Value
see reg. desc.
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uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
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uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu 1410
uuuu uuuu
uuuu 0000
P R E L I M I N A R Y
NNXDAL: Next Next Transmit Descriptor Address Lower
NNXDAU: Next Next Transmit Descriptor Address Upper
CRBC: Current Receive Byte Count
CRST: Current Receive Status
CXBC: Current Transmit Byte Count
CXST: Current Transmit Status
NRBC: Next Receive Byte Count
NRST: Next Receive Status
POLL: Poll Time Counter
PI: Polling Interval
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
SWS: Software Style
Reserved
PXDAL: Previous Transmit Descriptor Address Lower
PXDAU: Previous Transmit Descriptor Address Upper
PXBC: Previous Transmit Byte Count
PXST: Previous Transmit Status
NXBA: Next Transmit Buffer Address Lower
NXBAU: Next Transmit Buffer Address Upper
NXBC: Next Transmit Byte Count
NXST: Next Transmit Status
Reserved
Reserved
Reserved
Reserved
RCVRC: Receive Ring Counter
Reserved
XMTRC: Transmit Descriptor Ring Counter
Reserved
RCVRL: Receive Descriptor Ring Length
Reserved
XMTRL: Transmit Descriptor Ring Length
Reserved
DMATCFW: DMA Transfer Counter and FIFO Watermark
Reserved
DMABAT: Bus Activity Timer
Am79C970A
Comments
AMD
Use
T
S
S
T
T
T
S
S
S
S
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
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