AM79C970AKCW AMD [Advanced Micro Devices], AM79C970AKCW Datasheet - Page 203
AM79C970AKCW
Manufacturer Part Number
AM79C970AKCW
Description
PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C970AKCW.pdf
(219 pages)
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To determine the value for the resistor and capacitor,
the formula is:
Where R is in Ohms and C is in microfarads. Some pos-
sible combinations are given below. To minimize the
voltage drop across the resistor, the R value should not
be more than 10 .
B-2
AMD
VDD plane
PCnet-PCI II
AVDD2
R * C
2.7
4.3
6.8
10
88
R
AVSS2
33 F
22 F
15 F
10 F
0.1 F
C
33 F to 10 F
1
to 10
19436A-58
VSS plane
Am79C970A
AVSS2 and AVDD2/AVDD4: These pins provide power
and ground for the AUI and twisted pair receive circuitry.
In addition, as mentioned earlier, AVSS2 and AVDD2
provide power and ground for the phase-lock loop por-
tion of the chip. Except for the filter circuit already
mentioned, no specific decoupling is necessary on
these pins.
AVDD1: AVDD1 provides power for the control and in-
terface logic in the PLL. Ground for this logic is provided
by digital ground pins. No specific decoupling is neces-
sary on this pin.
Special Note for Adapter Cards: In adapter card de-
signs, it is important to utilize all available power and
ground pins available on the bus edge connector. In
addition, the connection from the bus edge connector to
the power or ground plane should be made through
more than one via and with wide traces (15 mils desir-
able) wherever possible. Following these recommenda-
tions results in minimal inductance in the power and
ground paths. By minimizing this inductance, ground
bounce is minimized.
See also the PCnet Family Board Design and Layout
Recommendations applications note (PID# 19595) for
additional information.
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