S71WS256NC0BAWE32 SPANSION [SPANSION], S71WS256NC0BAWE32 Datasheet - Page 147

• Manufacturer Part Number: S71WS256NC0BAWE32
• Description: Stacked Multi-Chip Product (MCP)
• Manufacturer: SPANSION [SPANSION]

1.8V pSRAM Type 4
8M x 16-bit Synchronous Burst pSRAM
Features
Publication Number S71WS-N_01
Process Technology: CMOS
Organization: 8M x16 bit Power Supply Voltage: 1.7–2.0V
Three State Outputs
Supports MRS (Mode Register Set)
MRS control - MRS Pin Control
Supports Power Saving modes - Partial Array Refresh mode Internal TCSR
Supports Driver Strength Optimization for system environment power saving
Supports Asynchronous 4-Page Read and Asynchronous Write Operation
Supports Synchronous Burst Read and Asynchronous Write Operation (Address Latch Type
and Low ADV Type)
Supports Synchronous Burst Read and Synchronous Burst Write Operation
Synchronous Burst (Read/Write) Operation
— Supports 4 word / 8 word / 16 word and Full Page(256 word) burst
— Supports Linear Burst type & Interleave Burst type
— Latency support:
— Supports Burst Read Suspend in No Clock toggling
— Supports Burst Write Data Masking by /UB & /LB pin control
— Supports WAIT pin function for indicating data availability.
Max. Burst Clock Frequency: 66MHz
Latency 5 @ 66MHz(tCD 10ns)
Latency 4 @ 54MHz(tCD 10ns)
Revision A
Amendment 4
Issue Date September 15, 2005
INFORMATION
ADVANCE