AM41LV3204MB10IT AMD [Advanced Micro Devices], AM41LV3204MB10IT Datasheet - Page 14
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AM41LV3204MB10IT
Manufacturer Part Number
AM41LV3204MB10IT
Description
Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM41LV3204MB10IT.pdf
(67 pages)
Legend: L = Logic Low = V
Input, Byte Mode, SADD = Flash Sector Address, A
Data Out, DNU = Do Not Use
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE#f = V
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = V
5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “”.
6. If WP#/ACC = V
June 10, 2003
Operation
(Notes 1, 2)
Read from Flash
Write to Flash
Standby
Output Disable
Flash Hardware
Reset
Sector Protect
(Note 5)
Sector Unprotect
(Note 5)
Temporary
Sector Unprotect
Read from SRAM
Write to SRAM
If WP#/ACC = V
depends on whether they were last protected or unprotected using the method described in “”. If WP#/ACC = V
be unprotected.
Table 4. Device Bus Operations—Flash Byte Mode, CIOf = V
V
CE#f CE1#s CE2s OE# WE#
0.3 V
ACC
IL
IL
CC
, the two outermost boot sectors remain protected. If WP#/ACC = V
, the boot sectors will be protected. If WP#/ACC = V
H
H
H
L
L
X
L
L
X
(9V), the program time will be reduced by 40%.
IL
, CE1#s = V
IL
H
X
H
X
H
X
H
X
H
X
H
X
H
X
, H = Logic High = V
L
L
L
X
X
X
H
X
X
X
X
H
H
L
L
L
L
L
L
L
IL
and CE2s = V
H
H
H
H
X
X
X
X
L
L
P R E L I M I N A R Y
H
X
H
X
X
H
L
L
L
L
IH
, V
IN
IH
ID
= Address In (for Flash Byte Mode, DQ15 = A-1), D
SA
SA
SA
SA
Am41LV3204M
X
X
X
X
X
X
X
at the same time.
= 11.5–12.5 V, V
A1 = H,
A1 = H,
A6 = L,
A6 = L,
SADD,
SADD,
A0 = L
A0 = L
Addr.
A
A
A
A
A
X
X
X
IN
IN
IN
IN
IN
(Note 3)
IH
LB#s
DNU
HH
the boot sectors protection will be removed.
X
X
X
X
X
X
X
X
X
= 9.0 ± 0.5 V, X = Don’t Care, SA = SRAM Address
(Note 3)
UB#s
DNU
IL
X
X
X
X
X
X
X
X
X
; SRAM Byte Mode, CIOs = V
IH
, the two outermost boot sector protection
RESET#
V
0.3 V
V
V
V
CC
H
H
H
H
H
L
ID
ID
ID
WP#/ACC
(Note 4)
(Note 6)
(Note 6)
(Note 3)
L/H
L/H
L/H
L/H
H
X
X
IN
= Data In, D
High-Z
High-Z
High-Z
HH,
DQ7–
D
D
DQ0
D
D
D
D
D
OUT
OUT
IN
IN
IN
IN
IN
all sectors will
SS
DQ15–
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
OUT
DQ8
X
X
=
13