AM41LV3204MB10IT AMD [Advanced Micro Devices], AM41LV3204MB10IT Datasheet - Page 8

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AM41LV3204MB10IT

Manufacturer Part Number
AM41LV3204MB10IT
Description
Stacked Multi-chip Package (MCP) 32 Mbit (4 M x 8 bit/2 M x 16-bit) Flash Memory and 4 Mbit (512K x 8-Bit/256 K x 16-Bit) Static RAM
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
PIN DESCRIPTION
A20–A0
DQ14–DQ0 = 15 Data inputs/outputs
DQ15/A-1
CE#f
CE1#s, CE2s= Chip Enable (SRAM)
OE#
WE#
WP#/ACC
RESET#f
V
V
V
NC
UB#s
LB#s
CIOs
SA
CIOf
June 10, 2003
CC
CC
SS
f
s
= 21 Address inputs
= DQ15 (Data input/output, word mode),
= Chip Enable input (Flash)
= Output Enable input (Flash)
= Write Enable input (Flash)
= Hardware Write Protect input/Pro-
= Hardware Reset Pin input (Flash)
= Flash 3.0 volt-only single power sup-
= SRAM Power Supply
= Device Ground
= Pin Not Connected Internally
= Upper Byte Control (SRAM)
= Lower Byte Control (SRAM)
= I/O Configuration (SRAM)
= Highest Order Address Pin (SRAM)
= I/O Configuration (Flash)
A-1 (25B Address input, byte mode)
gramming Acceleration input (Flash)
ply (see Product Selector Guide for
speed options and voltage
supply tolerances)
CIOs = V
CIOs = V
Byte Mode
CIOf = V
CIOf = V
IH
IL
IH
IL
= Byte Mode (X8)
= Word Mode (x16)
= Byte Mode (X8)
= Word Mode (x16)
P R E L I M I N A R Y
Am41LV3204M
LOGIC SYMBOL
21
CIOf
CIOs
SA#
CE1#s
OE#
A20–A0
WE#
WP#/ACC
RESET#f
CE2s
UB#s
LB#s
DQ15–DQ0
RY/BY#
(A-1)
16 or 8
7

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