PPC440EPX-NPAFFFTS AMCC [Applied Micro Circuits Corporation], PPC440EPX-NPAFFFTS Datasheet - Page 78

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PPC440EPX-NPAFFFTS

Manufacturer Part Number
PPC440EPX-NPAFFFTS
Description
PowerPC 440EPx Embedded Processor
Manufacturer
AMCC [Applied Micro Circuits Corporation]
Datasheet
440EPx – PPC440EPx Embedded Processor
Table 19. Peripheral Interface Clock Timings (Sheet 3 of 3)
78
TmrClk frequency
TmrClk period
TmrClk high time
TmrClk low time
Notes:
1. T
2. An internal PLL improves this duty cycle to a worst case of 48% minimum, 52% maximum.
3. Crystals, external clocks, or external oscillators must have a maximum tolerance of ±100 ppm and maximum jitter of ±100 ps.Only a
Crystal – Frequency: 48MHz
C = 2(C
frequency is 83 MHz.
frequencies of 48 MHz is allowed for oscillators; only a frequencies of 48 MHz is allowed for crystals. Crystals and oscillators should be
connected as shown below:
OPB
C
C
USB2XtalIn
is the period in ns of the OPB clock. The internal OPB clock runs at 1/2 the frequency of the PLB clock. The maximum OPB clock
L
Stray
is the load capacitance required by the crystal for oscillation
L
− C
Resonance mode: parallel
C
ESR: 20-60Ω
Drive level: 50–500μW
is the board parasitic capacitance
O
: 15–30pF
Stray
) where
Parameter
C
PPC440EPx
Crystal
C
USB2XtalOUT
40% of nominal period
40% of nominal period
Min
10
USB2XtalIn
60% of nominal period
60% of nominal period
Revision 1.26 – October 15, 2007
Preliminary Data Sheet
PPC440EPx
Max
100
Osc
USB2XtalOut
Units
MHz
ns
ns
ns
AMCC Proprietary
Notes

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