EDD5108AFTA_06 ELPIDA [Elpida Memory], EDD5108AFTA_06 Datasheet - Page 25

• Manufacturer Part Number: EDD5108AFTA_06
• Description: 512M bits DDR SDRAM
• Manufacturer: ELPIDA [Elpida Memory]

Mode Register and Extended Mode Register Set
There are two mode registers, the mode register and the extended mode register so as to define the operating
mode. Parameters are set to both through the A0 to the A12 and BA0, BA1 pins by the mode register set command
[MRS] or the extended mode register set command [EMRS]. The mode register and the extended mode register are
set by inputting signal via the A0 to the A12 and BA0, BA1 during mode register set cycles. BA0 and BA1 determine
which one of the mode register or the extended mode register are set. Prior to a read or a write operation, the mode
register must be set.
Remind that no other parameters shown in the table bellow are allowed to input to the registers.
Data Sheet E0699E50 (Ver. 5.0)
BA0
0
MRS
BA0
1
EMRS
BA1
0
BA1
A8
0 No
1 Yes
0
A12
DLL Reset
0
A12
0
Extended Mode Register Set [EMRS] (BA0 = 1, BA1 = 0)
A11 A10
0
A11 A10
0
Mode Register Set [MRS] (BA0 = 0, BA1 = 0)
0
A6 A5 A4 CAS Latency
0
0
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1
A9
0
A9
0
0
1
0
1
0
1
0
1
DR
A8
A8
Reserved
Reserved
Reserved
Reserved
Reserved
0
A7
2.5
0
2
3
A7
0
25
A6
A6
0
LMODE
A1
0 Normal
1 Weak
A5
A3
EDD5108AFTA, EDD5116AFTA
0 Sequential
1 Interleave
A5
0
Driver Strength
Burst Type
A4
A4
0
A3
BT
A3
0
A2 A1 A0 Burst Length
A2
A2
0
0
0
0
1
1
1
1
0
A0
0 DLL Enable
1 DLL Disable
0
0
1
1
0
0
1
1
A1
DS
A1
BL
DLL Control
0
1
0
1
0
1
0
1
DLL
A0
A0
Reserved
Reserved
Reserved
Reserved
Reserved
2
4
8