EDD5108AFTA_06 ELPIDA [Elpida Memory], EDD5108AFTA_06 Datasheet - Page 46

• Manufacturer Part Number: EDD5108AFTA_06
• Description: 512M bits DDR SDRAM
• Manufacturer: ELPIDA [Elpida Memory]

Mode Register Set Cycle
Read/Write Cycle
Data Sheet E0699E50 (Ver. 5.0)
DQ (output)
DQ (output)
DQ (input)
Address
Address
/RAS
/CAS
DQS
CKE
/RAS
/CAS
DQS
/WE
CKE
/CK
/CS
DM
/WE
CK
BA
/CK
/CS
DM
CK
BA
VIH
Bank 0
Active
R:a
VIH
Precharge
If needed
High-Z
High-Z
valid
0
1
High-Z
tRP
Bank 0
Read
2
C:a
Mode
register
set
code
code
Bank 3
Active
3
R:b
tMRD
4
tRWD
a
Bank 3
Active
R: b
5
46
6
7
EDD5108AFTA, EDD5116AFTA
Bank 3
Read
C: b
Bank 3
Write
8
C:b
9
b
Bank 3
Precharge
tWRD
10
b
11
Bank 3
Read
C:b''
12
CL = 2
BL = 4
13
Read cycle
CL = 2
BL = 4
= VIH or VIL
=VIH or VIL
14
b’’
15