YMF754-V ETC, YMF754-V Datasheet - Page 42

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YMF754-V

Manufacturer Part Number
YMF754-V
Description
DS-1E
Manufacturer
ETC
Datasheet
YMF754
2-3. MPU401
F8h: Interrupt Flag Register
2-2-4. SB IRQ Status
b0................SBI: SB Interrupt Flag
The following shows the MPUBase I/O map for MPU401.
+1h (W)
This bit indicates that the SB DSP occurs the interrupt. This bit is read only. Thus, read the SB DSP
read port to clearing the interrupt and this bit. Then, the value of the read port is invalid.
MPU401 block is for transmitting and receiving MIDI data. It is compatible with UART mode of
“MPU401”. Full duplex operation is possible using the 16-byte FIFO for each direction, transmitting and
receiving.
+1h (R)
b7
-
port
+0h
Read Only
Default: 00h
MPUBase
MPUBase + 1h
MPUBase + 1h
b6
-
/DSR
D7
b5
-
/DRR
D6
b4
(R/W)
(R)
(W)
-
b3
-
D5
-
MIDI Data port
Status Register port
Command Register port
b2
-
D4
-
Command
-42-
b1
-
Data
SBI
D3
b0
-
D2
-
D1
-
D0
-
June 28, 1999

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