YMF754-V ETC, YMF754-V Datasheet - Page 5
![no-image](/images/no-image-200.jpg)
YMF754-V
Manufacturer Part Number
YMF754-V
Description
DS-1E
Manufacturer
ETC
Datasheet
1.YMF754-V.pdf
(60 pages)
- Current page: 5 of 60
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YMF754
1. PCI Bus Interface (54-pin)
2. AC’97 Interface (8-pin)
PCICLK
RST#
AD[31:0]
C/BE[3:0]#
PAR
FRAME#
IRDY#
TRDY#
STOP#
IDSEL
DEVSEL#
REQ#
GNT#
PCREQ#
PCGNT#
PERR#
SERR#
INTA#
SERIRQ#
CLKRUN#
CRST#
CMCLK
CBCLK
CSDO
CSYNC
CSDI0
CSDI1
DOCKEN#
PIN DESCRIPTION
Name
Name
I/O
I/O
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
Type
Type
Pstr
Pstr
Pstr
Pstr
Pstr
Pod
Pod
Tup
Tup
Pstr
Ptr
Ptr
Ptr
Ptr
Ptr
Ptr
Ptr
T
C
T
T
T
T
P
P
P
P
P
6mA
6mA
6mA
Size
Size
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-5-
PCI Clock
Reset
Address / Data
Command / Byte Enable
Parity
Frame
Initiator Ready
Target Ready
Stop
ID Select
Device Select
PCI Bus Master Request
PCI Bus Master Grant
PC/PCI Request
PC/PCI Grant
Parity Error
System Error
Interrupt signal output for PCI Bus
Serialized IRQ
Clock Run
Reset signal for AC’97
Master Clock for AC’97 (24.576MHz)
AC-link: Bit Clock for AC’97 audio data
AC-link: AC’97 Serial audio output data
AC-link: AC’97 Synchronized signal
AC-link: AC’97 Serial audio input data (Primary)
AC-link: AC’97 Serial audio input data (Secondary)
Secondary AC’97 Enable
Function
Function
June 28, 1999
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