K9K1G08R0B SAMSUNG [Samsung semiconductor], K9K1G08R0B Datasheet - Page 33

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K9K1G08R0B

Manufacturer Part Number
K9K1G08R0B
Description
128M x 8 Bit NAND Flash Memory
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet

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Copy-Back Program
The copy-back program is configured to quickly and efficiently rewrite data stored in one page within the plane to another page within
the same plane without utilizing an external memory. Since the time-consuming sequently-reading and its re-loading cycles are
removed, the system performance is improved. The benefit is especially obvious when a portion of a block is updated and the rest of
the block also need to be copied to the newly assigned free block. The operation for performing a copy-back program is a sequential
execution of page-read without burst-reading cycle and copying-program with the address of destination page. A normal read opera-
tion with "00h" command and the address of the source page moves the whole 528byte data into the internal buffer. As soon as the
device returns to Ready state, Page-Copy Data-input command (8Ah) with the address cycles of destination page followed may be
written. The Program Confirm command (10h) is required to actually begin the programming operation. Copy-Back Program opera-
tion is allowed only within the same memory plane. Once the Copy-Back Program is finished, any additional partial page program-
ming into the copied pages is prohibited before erase. A14, A15 and A26 must be the same between source and target page.
Figure20 shows the command sequence for single plane operation. "When there is a program-failure at Copy-Back operation,
error is reported by pass/fail status. But if the soure page has a bit error for charge loss, accumulated copy-back operations
could also accumulate bit errors. For this reason, two bit ECC is recommended for copy-back operation. "
Figure 17. One Page Copy-Back program Operation
K9K1G08R0B
K9K1G08B0B
K9K1G08U0B
R/B
I/O
0
~
7
00h
A
Source Address
0
Add.(4Cycles)
~ A
7
& A
9
~ A
26
t
R
8Ah
Destination Address
A
0
Add.(4Cycles)
~ A
7
& A
33
9
~ A
26
10h
t
PROG
FLASH MEMORY
70h
I/O
Fail
Advance
0
Pass

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