MT48LC2M32B2TG-6 :G Micron, MT48LC2M32B2TG-6 :G Datasheet - Page 64
![no-image](/images/no-image-200.jpg)
MT48LC2M32B2TG-6 :G
Manufacturer Part Number
MT48LC2M32B2TG-6 :G
Description
DRAM Chip SDRAM 64M-Bit 3.3V 86-Pin TSOP-II
Manufacturer
Micron
Datasheet
1.MT48LC2M32B2B5-7G.pdf
(69 pages)
- Current page: 64 of 69
- Download datasheet (3Mb)
Figure 46:
COMMAND
PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5
64MSDRAMx32_2.fm - Rev. J 12/08 EN
BA0, BA1
DQM 0-3
A0-A9
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
T0
ROW
ROW
BANK
t CMH
t CKH
t AH
t AH
t AH
WRITE – with Auto Precharge
t RCD
t RAS
t RC
Notes:
t CK
T1
NOP
ENABLE AUTO PRECHARGE
1. For this example, BL = 4.
2. Faster frequencies require two clocks (when
3. A8 and A9 = “Don’t Care.”
t CMS
t CL
t DS
COLUMN m 3
WRITE
T2
BANK
D
IN
t CMH
t CH
t DH
m
t DS
D
IN
T3
NOP
m + 1
t DH
t DS
D
IN
T4
NOP
m + 2
t DH
64
t DS
D
IN
T5
NOP
m + 3
t DH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t WR
2
t
WR >
T6
NOP
t
CK).
T7
NOP
©2001 Micron Technology, Inc. All rights reserved.
64Mb: x32 SDRAM
Timing Diagrams
t RP
NOP
T8
ACTIVE
ROW
ROW
BANK
T9
DON’T CARE
UNDEFINED
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