S9S12G96F0MLH Freescale Semiconductor, S9S12G96F0MLH Datasheet - Page 225
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S9S12G96F0MLH
Manufacturer Part Number
S9S12G96F0MLH
Description
16-bit Microcontrollers - MCU 16BIT 96K FLASH
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G96F0MLH
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
96 KB
Data Ram Size
8192 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S12G96F0MLH
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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1
2.4.3.33
APICLKS7
Freescale Semiconductor
Address 0x0257
PKGCR
WOMM
Read: Anytime
Write:
Field
Field
Reset
3-0
2-0
7
APICLKS7: Anytime
PKGCR2-0: Once in normal mode, anytime in special mode
W
R
After deassert of system reset the values are automatically loaded from the Flash memory. See device specification
for details.
APICLKS7
Port M wired-or mode—Enable open-drain functionality on output pin
This bit configures an output pin as wired-or (open-drain) or push-pull. In wired-or mode a logic “0” is driven
active-low while a logic “1” remains undriven. This allows a multipoint connection of several serial modules. The bit
has no influence on pins used as input.
1 Output buffer operates as open-drain output.
0 Output buffer operates as push-pull output.
Pin Routing Register API_EXTCLK —Select PS7 as API_EXTCLK output
When set to 1 the API_EXTCLK output will be routed to PS7. The default pin will be disconnected in all packages
except 20 TSSOP, which has no default location for API_EXTCLK. See
Package Code Register —Select package in use
Those bits are preset by factory and reflect the package in use. See
The bits can be modified once after reset to allow software development for a different package. In any other
application it is recommended to re-write the actual package code once after reset to lock the register from
inadvertent changes during operation.
Writing reserved codes or codes of larger packages than the given device is offered in are illegal. In these cases the
code will be converted to PKGCR[2:0]=0b111 and select the maximum available package option for the given device.
Codes writes of smaller packages than the given device is offered in are not restricted.
Depending on the package selection the input buffers of non-bonded pins are disabled to avoid shoot-through
current. Also a predefined signal routing will take effect.
Refer also to
Package Code Register (PKGCR)
0
7
Section 2.6.5, “Emulation of Smaller
0
0
6
Table 2-58. PKGCR Register Field Descriptions
Table 2-57. WOMM Register Field Descriptions
Figure 2-34. Package Code Register (PKGCR)
MC9S12G Family Reference Manual, Rev.1.23
0
0
5
0
0
4
Packages”.
Description
Description
3
0
0
Table 2-60
Table 2-59
PKGCR2
F
2
Port Integration Module (S12GPIMV1)
for code definition.
for more details.
PKGCR1
Access: User read/write
F
1
PKGCR0
F
0
227
1
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