S9S12G96F0MLH Freescale Semiconductor, S9S12G96F0MLH Datasheet - Page 319
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S9S12G96F0MLH
Manufacturer Part Number
S9S12G96F0MLH
Description
16-bit Microcontrollers - MCU 16BIT 96K FLASH
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G96F0MLH
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
96 KB
Data Ram Size
8192 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S12G96F0MLH
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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8.3.2.5
Read: Only when unlocked AND unsecured AND not armed AND TSOURCE set.
Write: Aligned word writes when disarmed unlock the trace buffer for reading but do not affect trace buffer
contents.
8.3.2.6
Freescale Semiconductor
Address: 0x0024, 0x0025
Address: 0x0026
Resets
Bit[15:0]
Other
Reset
POR
Field
15–0
POR
1
W
W
R
R
Currently defaults to Comparator A, Comparator B disabled
ABCM
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
—
00
01
10
11
15
X
Trace Buffer Data Bits — The Trace Buffer Register is a window through which the 20-bit wide data lines of the
Trace Buffer may be read 16 bits at a time. Each valid read of DBGTB increments an internal trace buffer pointer
which points to the next address to be read. When the ARM bit is set the trace buffer is locked to prevent reading.
The trace buffer can only be unlocked for reading by writing to DBGTB with an aligned word write when the
module is disarmed. The DBGTB register can be read only as an aligned word, any byte reads or misaligned
access of these registers return 0 and do not cause the trace buffer pointer to increment to the next trace buffer
address. Similarly reads while the debugger is armed or with the TSOURCE bit clear, return 0 and do not affect
the trace buffer pointer. The POR state is undefined. Other resets do not affect the trace buffer contents.
TBF
Debug Trace Buffer Register (DBGTBH:DBGTBL)
Debug Count Register (DBGCNT)
—
0
7
—
14
X
—
13
X
Match0 mapped to comparator A match: Match1 mapped to comparator B match.
—
= Unimplemented or Reserved
0
0
6
Figure 8-7. Debug Trace Buffer Register (DBGTB)
—
12
X
Match 0 mapped to comparator A/B outside range: Match1 disabled.
Match 0 mapped to comparator A/B inside range: Match1 disabled.
Figure 8-8. Debug Count Register (DBGCNT)
MC9S12G Family Reference Manual, Rev.1.23
Table 8-11. DBGTB Field Descriptions
—
11
X
—
0
5
Table 8-10. ABCM Encoding
—
10
X
—
X
9
—
0
4
Bit 8
—
Description
X
8
Description
Reserved
Bit 7
—
X
7
1
—
0
3
Bit 6
—
X
6
CNT
Bit 5
—
X
5
—
0
2
Bit 4
—
X
4
S12S Debug Module (S12SDBGV2)
Bit 3
—
X
3
—
0
1
Bit 2
—
X
2
Bit 1
—
X
1
—
0
0
Bit 0
—
X
0
321
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