MAX1267BEEG Maxim Integrated, MAX1267BEEG Datasheet - Page 16

• Manufacturer Part Number: MAX1267BEEG
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1267BEEG

• Number Of Channels: 2/1
• Architecture: SAR
• Conversion Rate: 265 KSPs
• Resolution: 12 bit
• Input Type: Single-Ended/Pseudo-Differential
• Snr: Yes
• Interface Type: Parallel
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QSOP-24
• Maximum Power Dissipation: 762 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: Internal 2.5 V or External

acquisition cycle of the next conversion, then reading the
results of the previous conversion from the bus. This
technique (Figure 10) allows a conversion to be com-
pleted every 16 clock cycles. Note that the switching of
265ksps, +3V, 6-/2-Channel, 12-Bit ADCs
with +2.5V Reference and Parallel Interface
Figure 10. Timing Diagram for Fastest Conversion
16
Figure 11. Power-Supply and Grounding Connections
*R = 5Ω
D7–D0
STATE
CLK
______________________________________________________________________________________
WR
RD
*OPTIONAL
V
+3V
DD
CONTROL
WORD
4.7µF
0.1µF
1
ACQUISITION
MAX1265
MAX1267
GND
2
D11–
D0
3
SUPPLIES
SAMPLING INSTANT
COM
4
5
6
+3V
+3V
CIRCUITRY
DIGITAL
7
DGND
GND
8
9
CONTROL WORD
CONVERSION
10
the data bus during acquisition or conversion can
cause additional supply noise, which can make it diffi-
cult to achieve true 12-bit performance.
For best performance, use printed circuit (PC) boards.
Wire-wrap configurations are not recommended since
the layout should ensure proper separation of analog
and digital traces. Do not run analog and digital lines
parallel to each other, and do not lay out digital signal
paths underneath the ADC package. Use separate
analog and digital PC board ground sections with only
one star point (Figure 11) connecting the two ground
systems (analog and digital). For lowest noise opera-
tion, ensure the ground return to the star ground’s
power supply is low impedance and as short as possi-
ble. Route digital signals far away from sensitive analog
and reference inputs.
High-frequency noise in the power supply, V
impair operation of the ADC’s fast comparator. Bypass
V
capacitors, 0.1µF and 4.7µF, located as close as to the
MAX1265/MAX1267s’ power-supply pin as possible.
Minimize capacitor lead length for best supply-noise
rejection and add an attenuation resistor (5Ω) if the
power supply is extremely noisy.
DD
11
to the star ground with a network of two parallel
12
Layout, Grounding, and Bypassing
13
14
15
16
D11–D0
ACQUISITION
DD
, could