S9S12GN16F0VLF Freescale Semiconductor, S9S12GN16F0VLF Datasheet - Page 1096
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S9S12GN16F0VLF
Manufacturer Part Number
S9S12GN16F0VLF
Description
16-bit Microcontrollers - MCU 16-bit16k Flash 2k RAM
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12GN16F0VLF
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
16 KB
Data Ram Size
1024 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
TSSOP-20
Mounting Style
SMD/SMT
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192 KByte Flash Module (S12FTMRG192K2V1)
30.3.2.2
The FSEC register holds all bits associated with the security of the MCU and Flash module.
1
All bits in the FSEC register are readable but not writable.
During the reset sequence, the FSEC register is loaded with the contents of the Flash security byte in the
Flash configuration field at global address 0x3_FF0F located in P-Flash memory (see
1098
Loaded from IFR Flash configuration field, during reset sequence.
Offset Module Base + 0x0001
Reset
W
R
Flash Security Register (FSEC)
F
7
1
KEYEN[1:0]
1
2
BUSCLK is Greater Than this value.
BUSCLK is Less Than or Equal to this value.
BUSCLK Frequency
MIN
10.6
11.6
12.6
13.6
14.6
15.6
1.0
1.6
2.6
3.6
4.6
5.6
6.6
7.6
8.6
9.6
1
Table 30-8. FDIV values for various BUSCLK Frequencies
(MHz)
F
= Unimplemented or Reserved
6
1
Figure 30-6. Flash Security Register (FSEC)
MAX
10.6
11.6
12.6
13.6
14.6
15.6
16.6
1.6
2.6
3.6
4.6
5.6
6.6
7.6
8.6
9.6
MC9S12G Family Reference Manual,
2
F
5
1
FDIV[5:0]
0x0C
0x0D
0x0A
0x0B
0x0E
0x0F
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
F
4
1
RNV[5:2]
BUSCLK Frequency
MIN
16.6
17.6
18.6
19.6
20.6
21.6
22.6
23.6
24.6
1
F
3
(MHz)
1
Rev.1.23
MAX
17.6
18.6
19.6
20.6
21.6
22.6
23.6
24.6
25.6
2
F
2
1
FDIV[5:0]
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
Freescale Semiconductor
F
Table
1
1
SEC[1:0]
30-4) as
F
0
1
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