S9S12GN16F0VLF Freescale Semiconductor, S9S12GN16F0VLF Datasheet - Page 799
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S9S12GN16F0VLF
Manufacturer Part Number
S9S12GN16F0VLF
Description
16-bit Microcontrollers - MCU 16-bit16k Flash 2k RAM
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12GN16F0VLF
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
16 KB
Data Ram Size
1024 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
TSSOP-20
Mounting Style
SMD/SMT
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24.3.2.16 Flash Option Register (FOPT)
The FOPT register is the Flash option register.
1
All bits in the FOPT register are readable but are not writable.
During the reset sequence, the FOPT register is loaded from the Flash nonvolatile byte in the Flash
configuration field at global address 0x3_FF0E located in P-Flash memory (see
by reset condition F in
containing the Flash nonvolatile byte during the reset sequence, all bits in the FOPT register will be set.
24.3.2.17 Flash Reserved5 Register (FRSV5)
This Flash register is reserved for factory testing.
All bits in the FRSV5 register read 0 and are not writable.
24.3.2.18 Flash Reserved6 Register (FRSV6)
This Flash register is reserved for factory testing.
Freescale Semiconductor
Loaded from IFR Flash configuration field, during reset sequence.
NV[7:0]
Offset Module Base + 0x0010
Offset Module Base + 0x0011
Reset
Reset
Field
7–0
W
W
R
R
Nonvolatile Bits — The NV[7:0] bits are available as nonvolatile bits. Refer to the device user guide for proper
use of the NV bits.
F
0
0
7
7
1
Figure
F
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
6
6
1
Figure 24-22. Flash Reserved5 Register (FRSV5)
24-21. If a double bit fault is detected while reading the P-Flash phrase
Figure 24-21. Flash Option Register (FOPT)
MC9S12G Family Reference Manual, Rev.1.23
Table 24-23. FOPT Field Descriptions
F
0
0
5
5
1
F
0
0
4
4
1
Description
NV[7:0]
F
0
0
3
3
1
16 KByte Flash Module (S12FTMRG16K1V1)
F
0
0
2
2
1
Table
F
24-4) as indicated
0
0
1
1
1
F
0
0
0
0
1
801
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