S9S12GN16F0VLF Freescale Semiconductor, S9S12GN16F0VLF Datasheet - Page 400
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S9S12GN16F0VLF
Manufacturer Part Number
S9S12GN16F0VLF
Description
16-bit Microcontrollers - MCU 16-bit16k Flash 2k RAM
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12GN16F0VLF
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
16 KB
Data Ram Size
1024 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
TSSOP-20
Mounting Style
SMD/SMT
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OSCPINS_EN
S12 Clock, Reset and Power Management Unit (S12CPMU)
402
Reserved
Reserved
OSCE
Field
4-0
7
6
5
Oscillator Enable Bit — This bit enables the external oscillator (XOSCLCP). The UPOSC status bit in the
CPMUFLG register indicates when the oscillation is stable and OSCCLK can be selected as Bus Clock or source
of the COP or RTI. A loss of oscillation will lead to a clock monitor reset.
0 External oscillator is disabled.
1 External oscillator is enabled.Clock monitor is enabled.External oscillator is qualified by PLLCLK
Note: When starting up the external oscillator (either by programming OSCE bit to 1 or on exit from Full Stop
Do not alter this bit from its reset value. It is for Manufacturer use only and can change the PLL behavior.
Oscillator Pins EXTAL and XTAL Enable Bit
If OSCE=1 this read-only bit is set. It can only be cleared with the next reset.
Enabling the external oscillator reserves the EXTAL and XTAL pins exclusively for oscillator application.
0 EXTAL and XTAL pins are not reserved for oscillator.
1 EXTAL and XTAL pins exclusively reserved for oscillator.
Do not alter these bits from their reset value. It is for Manufacturer use only and can change the PLL behavior.
REFCLK for PLL is IRCCLK.
REFCLK for PLL is the external oscillator clock divided by REFDIV.
Mode with OSCE bit already 1) the software must wait for a minimum time equivalent to the startup-time
of the external oscillator t
Table 10-24. CPMUOSC Field Descriptions
MC9S12G Family Reference Manual,
UPOSC
before entering Pseudo Stop Mode.
Description
Rev.1.23
Freescale Semiconductor
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