S9S12GN48F0VLF Freescale Semiconductor, S9S12GN48F0VLF Datasheet - Page 1131
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S9S12GN48F0VLF
Manufacturer Part Number
S9S12GN48F0VLF
Description
16-bit Microcontrollers - MCU S12 Core,64kFlash,Au
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12GN48F0VLF
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
48 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S12GN48F0VLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Upon clearing CCIF to launch the Erase EEPROM Sector command, the Memory Controller will erase the
selected Flash sector and verify that it is erased. The CCIF flag will set after the Erase EEPROM Sector
operation has completed.
30.4.7
The Flash module can generate an interrupt when a Flash command operation has completed or when a
Flash command operation has detected an ECC fault.
Freescale Semiconductor
Register
FSTAT
Flash Command Complete
ECC Double Bit Fault on Flash Read
ECC Single Bit Fault on Flash Read
Interrupts
Interrupt Source
Table 30-64. Erase EEPROM Sector Command FCCOB Requirements
CCOBIX[2:0]
MGSTAT1
MGSTAT0
Table 30-65. Erase EEPROM Sector Command Error Handling
ACCERR
Error Bit
000
001
FPVIOL
MC9S12G Family Reference Manual, Rev.1.23
Global address [15:0] anywhere within the sector to be erased.
Set if CCOBIX[2:0] != 001 at command launch
Set if command not available in current mode (see
Set if an invalid global address [17:0] is suppliedsee
Set if a misaligned word address is supplied (global address [0] != 0)
Set if the selected area of the EEPROM memory is protected
Set if any errors have been encountered during the verify operation
Set if any non-correctable errors have been encountered during the verify
operation
Table 30-66. Flash Interrupt Sources
See
0x12
(FERSTAT register)
(FERSTAT register)
Section 30.1.2.2
(FSTAT register)
Interrupt Flag
DFDIF
SFDIF
CCIF
FCCOB Parameters
for EEPROM sector size.
Global address [17:16] to identify
Error Condition
(FERCNFG register)
(FERCNFG register)
(FCNFG register)
EEPROM block
Local Enable
192 KByte Flash Module (S12FTMRG192K2V1)
DFDIE
SFDIE
CCIE
Table
Table
30-27)
30-3)
Global (CCR)
Mask
I Bit
I Bit
I Bit
1133
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