S9S12GN48F0VLF Freescale Semiconductor, S9S12GN48F0VLF Datasheet - Page 626
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S9S12GN48F0VLF
Manufacturer Part Number
S9S12GN48F0VLF
Description
16-bit Microcontrollers - MCU S12 Core,64kFlash,Au
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12GN48F0VLF
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
48 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S12GN48F0VLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Freescale’s Scalable Controller Area Network (S12MSCANV3)
The synchronization jump width (see the Bosch CAN 2.0A/B specification for details) can be programmed
in a range of 1 to 4 time quanta by setting the SJW parameter.
The SYNC_SEG, TSEG1, TSEG2, and SJW parameters are set by programming the MSCAN bus timing
registers (CANBTR0, CANBTR1) (see
and
Table 18-37
related parameter values.
18.4.4
18.4.4.1
The MSCAN module behaves as described within this specification in all normal system operating modes.
Write restrictions exist for some registers.
628
Section 18.3.2.4, “MSCAN Bus Timing Register 1
Time Segment 1
Modes of Operation
gives an overview of the Bosch CAN 2.0A/B specification compliant segment settings and the
Normal System Operating Modes
5 .. 10
4 .. 11
5 .. 12
6 .. 13
7 .. 14
8 .. 15
9 .. 16
It is the user’s responsibility to ensure the bit time settings are in compliance
with the CAN standard.
Transmit Point
Sample Point
Table 18-37. Bosch CAN 2.0A/B Compliant Bit Time Segment Settings
SYNC_SEG
Syntax
TSEG1
3 .. 10
4 .. 11
5 .. 12
6 .. 13
7 .. 14
8 .. 15
4 .. 9
MC9S12G Family Reference Manual,
System expects transitions to occur on the CAN bus during this
period.
A node in transmit mode transfers a new value to the CAN bus at
this point.
A node in receive mode samples the CAN bus at this point. If the
three samples per bit option is selected, then this point marks the
position of the third sample.
Table 18-36. Time Segment Syntax
Time Segment 2
Section 18.3.2.3, “MSCAN Bus Timing Register 0
2
3
4
5
6
7
8
NOTE
(CANBTR1)”).
Description
TSEG2
1
2
3
4
5
6
7
Rev.1.23
Synchronization
Jump Width
1 .. 2
1 .. 3
1 .. 4
1 .. 4
1 .. 4
1 .. 4
1 .. 4
Freescale Semiconductor
(CANBTR0)”
SJW
0 .. 1
0 .. 2
0 .. 3
0 .. 3
0 .. 3
0 .. 3
0 .. 3
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