S9S12GN48F0VLF Freescale Semiconductor, S9S12GN48F0VLF Datasheet - Page 244
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S9S12GN48F0VLF
Manufacturer Part Number
S9S12GN48F0VLF
Description
16-bit Microcontrollers - MCU S12 Core,64kFlash,Au
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12GN48F0VLF
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
48 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S12GN48F0VLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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1
1
Port Integration Module (S12GPIMV1)
2.4.3.61
2.4.3.62
246
Address 0x027C (G1, G2)
Address 0x027C (G3)
Address 0x027D
PIE0AD
Read: Anytime
Write: Anytime
Read: Anytime
Write: Anytime
Read: Anytime
Read: Anytime
Field
Reset
Reset
Reset
7-0
W
W
W
R
R
R
PIE0AD7
PIE1AD7
Port AD interrupt enable—
This bit enables or disables the edge sensitive pin interrupt on the associated pin. An interrupt can be generated if
the pin is operating in input or output mode when in use with the general-purpose or related peripheral function.
1 Interrupt is enabled
0 Interrupt is disabled (interrupt flag masked)
Port AD Interrupt Enable Register (PIE0AD)
0
0
0
Port AD Interrupt Enable Register (PIE1AD)
0
7
7
7
PIE0AD6
PIE1AD6
Figure 2-60. Port AD Interrupt Enable Register (PIE0AD)
Figure 2-61. Port AD Interrupt Enable Register (PIE1AD)
0
0
0
0
6
6
6
Table 2-87. PIE0AD Register Field Descriptions
MC9S12G Family Reference Manual,
PIE0AD5
PIE1AD5
0
0
0
0
5
5
5
PIE0AD4
PIE1AD4
0
0
0
0
4
4
4
Description
PIE0AD3
PIE0AD3
PIE1AD3
3
0
3
0
3
0
Rev.1.23
PIE0AD2
PIE0AD2
PIE1AD2
0
0
0
2
2
2
PIE0AD1
PIE0AD1
PIE1AD1
Freescale Semiconductor
Access: User read/write
Access: User read/write
Access: User read/write
0
0
0
1
1
1
PIE0AD0
PIE0AD0
PIE1AD0
0
0
0
0
0
0
1
1
1
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