MAX1245ACAP Maxim Integrated, MAX1245ACAP Datasheet - Page 4

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MAX1245ACAP

Manufacturer Part Number
MAX1245ACAP
Description
Analog to Digital Converters - ADC Integrated Circuits (ICs)
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX1245ACAP

Number Of Channels
8/4
Architecture
SAR
Conversion Rate
100 KSPs
Resolution
12 bit
Input Type
Single-Ended/Differential
Snr
70 dB
Interface Type
4-Wire (SPI, Microwire, QSPI, TMS320)
Operating Supply Voltage
2.375 V to 3.3 V
Maximum Operating Temperature
+ 70 C
Package / Case
SSOP-20
Maximum Power Dissipation
640 mW
Minimum Operating Temperature
0 C
Number Of Converters
1
Factory Pack Quantity
66
Voltage Reference
2.048 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MAX1245ACAP
Manufacturer:
MAXIM/美信
Quantity:
20 000
TIMING CHARACTERISTICS
(V
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
+2.375V, Low-Power, 8-Channel,
Serial 12-Bit ADC
(V
4
__________________________________________Typical Operating Characteristics
Acquisition Time
DIN to SCLK Setup
DIN to SCLK Hold
SCLK Fall to Output Data Valid
CS Fall to Output Enable
CS Rise to Output Disable
CS to SCLK Rise Setup
CS to SCLK Rise Hold
SCLK Pulse Width High
SCLK Pulse Width Low
SCLK Fall to SSTRB
CS Fall to SSTRB Output Enable
CS Rise to SSTRB Output Disable
SSTRB Rise to SCLK Rise
DD
DD
1.25
1.00
0.75
0.50
_______________________________________________________________________________________
= +2.375V to +3.3V, V
= 2.5V, VREF = 2.048V, f
2.375
C
Tested at V
Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has
been calibrated.
External reference (VREF = +2.048V), offset nulled.
Ground “on” channel; sine wave applied to all “off” channels.
Conversion time defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
The common-mode range for the analog inputs is from AGND to V
Guaranteed by design. Not subject to production testing.
ADC performance is limited by the converter’s noise floor, typically 300µVp-p.
Measured as
R
CODE = 101010100000
LOAD
PARAMETER
L
= ∞
= 50pF
2.625
vs. SUPPLY VOLTAGE
SUPPLY CURRENT
C
LOAD
DD
= 20pF
V
2.875
DD
|
V
= +2.375V; V
(V)
FS
COM
(2.375V) - V
CLK
3.125
= 0V, T
= 1.5MHz, C
SYMBOL
COM
t
SSTRB
t
t
t
t
t
t
3.375
A
ACQ
t
t
t
t
CSH
t
SCK
FS
t
CSS
t
SDV
STR
DO
DS
DH
DV
CH
TR
CL
= T
(3.3V)
= 0V; unipolar single-ended input mode.
MIN
LOAD
|
Figure 1
Figure 1
Figure 2
Figure 1
External clock mode only, Figure 1
External clock mode only, Figure 2
Internal clock mode only (Note 7)
to T
.
0.90
0.85
0.80
0.75
0.70
0.65
-55
MAX
= 20pF, T
R
CODE = 101010100000
L
, unless otherwise noted.)
-30
= ∞
-5
vs. TEMPERATURE
SUPPLY CURRENT
A
TEMPERATURE (°C)
CONDITIONS
= +25°C, unless otherwise noted.)
20
45
70
DD
95
.
120
145
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
2.375
MIN
200
200
300
300
2.0
20
0
0
INTEGRAL NONLINEARITY
2.625
vs. SUPPLY VOLTAGE
TYP
V
2.875
DD
(V)
MAX
260
240
400
260
240
400
0
3.125
UNITS
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3.375

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