XRT91L80ES Exar, XRT91L80ES Datasheet - Page 18

• Manufacturer Part Number: XRT91L80ES
• Description: Bus Transceivers Transceiver
• Manufacturer: Exar

Specifications of XRT91L80ES

• Product Category: Bus Transceivers
• Rohs: yes

XRT91L80
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
The SIPO is used to convert the 2.488/2.666 Gbps serial data input to 622.08/666.51 Mbps parallel data output
which can interface to a SONET Framer/ASIC. The SIPO bit de-interleaves the serial data input into a 4-bit
parallel output to RXDO[3:0]P/N. A simplified block diagram is shown in Figure 5.
F
The 4-bit LVDS 622.08/666.51 Mbps parallel data output of the receive path is used to interface to a SONET
Framer/ASIC synchronized to the recovered clock. A simplified block diagram is shown in Figure 6.
F
2.4
2.5
IGURE
IGURE
SDEXT
0
0
1
1
RXPCLKOP/N
RXDO3P/N
5. S
6. R
RXDO0P/N
RXDO1P/N
RXDO2P/N
Receive Serial Input to Parallel Output (SIPO)
Receive Parallel Output Interface
POLARITY LOSDMUTE I
IMPLIFIED
ECEIVE
0
1
0
1
4-bit Parallel LVDS Data Output
P
ARALLEL
B
LOCK
b
b
b
b
0
1
2
3
3
3
3
3
1
1
1
1
D
b
b
b
b
0
1
2
3
O
T
2
2
2
2
IAGRAM OF
ABLE
b
b
b
b
UTPUT
SONET Framer/ASIC
0
1
2
3
1
1
1
1
b
b
b
b
0
1
2
3
0
0
0
0
Active Low. Optical signal presence
indicated by SDEXT logic 0 input
from optical module.
Active High. Optical signal presence
indicated by SDEXT logic 1 input
from optical module.
Active Low. Optical signal presence
indicated by SDEXT logic 0 input
from optical module.
Active High. Optical signal presence
indicated by SDEXT logic 1 input
from optical module.
4: LOSD D
NTERNAL
I
NTERFACE
622.08/666.51 MHz
SIPO
S
IGNAL
ECLARATION
B
LOCK
time (0)
b
D
3
16
3
RXCLKO16P/N
ETECT
RXPCLKOP/N
b
RXDO0P/N
RXDO1P/N
RXDO2P/N
RXDO3P/N
2
3
b
1
3
b
P
0
SDEXT
3
OLARITY
POLARITY
b
3
2 b
STS-48/STM-16
Transceiver
LOSDMUTE
XRT91L80
2
2 b
2.488/2.666 Gbps
LOSDET
declared
declared
O
1
2 b
LOSD
LOSD
S
UTPUT
High
High
Low
Low
0
2
DISRD
ETTING
b
3
1 b
2
1 b
RXDO[3:0]P/N
1
1 b
Operation
Operation
0
Normal
Normal
1
Muted
Muted
b
3
0 b
2
0 b
1
0 b
xr
xr
xr
xr
0
0
R
Hi-Spd Received
Hi-Spd Received
Local Reference
Local Reference
EFERENCE
RXIP/N
CDR PLL
Clock
Clock
Data
Data
REV. 1.0.0
L
OCK