DAC1008D650HN/C1 NXP Semiconductors, DAC1008D650HN/C1 Datasheet - Page 29
DAC1008D650HN/C1
Manufacturer Part Number
DAC1008D650HN/C1
Description
Digital to Analog Converters - DAC DL 10BIT DAC 650MSPS 2X 4X OR 8X INT
Manufacturer
NXP Semiconductors
Datasheet
1.DAC1008D650HNC1.pdf
(98 pages)
Specifications of DAC1008D650HN/C1
Rohs
yes
Factory Pack Quantity
260
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NXP Semiconductors
DAC1008D650
Product data sheet
10.9.1.1 External regulation
10.9.1 Regulation
10.9.2 Full-scale current adjustment
10.9 Full-scale current
The DAC1008D650 reference circuitry integrates an internal bandgap reference voltage
which delivers a 1.29 V reference to the GAPOUT pin. It is recommended to decouple pin
GAPOUT using a 100 nF capacitor.
The reference current is generated via an external resistor of 953 (1 %) connected to
pin VIRES. A control amplifier sets the appropriate full-scale current (I
(see
This configuration is optimum for temperature drift compensation because the bandgap
reference voltage can be matched to the voltage across the feedback resistor.
The DAC current can also be set by applying an external reference voltage to the
non-inverting input pin GAPOUT and disabling the internal bandgap reference voltage
with bit GAP_PD (register 00h[0]; see
description”).
The default full-scale current (I
user to both DACs independently using the serial interface from 1.6 mA to 22 mA, 10 %.
The settings applied to DAC_A_GAIN_COARSE[3:0] (register 0Ah; see
“DAC_A_CFG_2 register (address 0Ah) bit description”
“DAC_A_CFG_3 register (address 0Bh) bit
(register 0Dh; see
register 0Eh; see
the coarse variation of the full-scale current (see
Fig 17. Internal reference configuration
Figure
17).
All information provided in this document is subject to legal disclaimers.
Table 32 “DAC_B_CFG_3 register (address 0Eh) bit
Table 31 “DAC_B_CFG_2 register (address 0Dh) bit description”
AGND
AGND
Rev. 3 — 31 January 2012
100 nF
O(fs)
953 Ω
(1 %)
) is 20 mA but further adjustments can be made by the
100
kΩ
Table 18 “COMMON register (address 00h) bit
2, 4 or 8 interpolating DAC with JESD204A
V
GAPOUT
VIRES
DDA(1V8)
description”) and DAC_B_GAIN COARSE[3:0]
BANDGAP
REF.
Table
13).
and register 0Bh; see
DAC1008D650
SOURCES
CURRENT
aaa-002266
ARRAY
DAC
O(fs)
description”) define
© NXP B.V. 2012. All rights reserved.
Table 28
) for both DACs
Table 29
29 of 98
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