iCE40LP1K-CM121 Lattice, iCE40LP1K-CM121 Datasheet - Page 15

• Manufacturer Part Number: iCE40LP1K-CM121
• Description: FPGA - Field Programmable Gate Array iCE40LP 1280 LUTs, 1.2V Ultra Low-Power
• Manufacturer: Lattice

Specifications of iCE40LP1K-CM121

• Rohs: yes
• Number Of Gates: 1280
• Number Of Logic Blocks: 16
• Number Of I/os: 95
• Maximum Operating Frequency: 533 MHz
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: CBGA-121
• Distributed Ram: 64 Kbit
• Minimum Operating Temperature: - 40 C
• Factory Pack Quantity: 490

Power Supply Ramp Rates
Power-On-Reset Voltage Levels
ESD Performance
Please refer to the
formance.
DC Electrical Characteristics
1. Assumes monotonic ramp rates.
2. iCE40LP384 status is Advanced, iCE40LP4K/iCE40LP8K status is Preliminary.
V
V
1. These POR trip points are only provided for guidance. Device operation is only characterized for power supply voltages specified under rec-
2. iCE40LP384 status is Advanced, iCE40LP4K/iCE40LP8K status is Preliminary.
I
C
C
V
I
1. Input or I/O leakage current is measured with the pin configured as an input or as an I/O with the output driver tri-stated. It is not measured
2. T
3. Please refer to V
4. Does not apply to the IOs in the SPI bank.
5. Some products are clamped to a diode when V
IL,
PU
PORUP
PORDN
HYST
1
2
Symbol
ommended operating conditions.
with the output driver active. Internal pull-up resistors are disabled.
4
I
IH
J
25°C, f = 1.0 MHz.
Symbol
1, 3, 4, 5
Symbol
t
RAMP
Input or I/O Leakage
I/O Capacitance
Global Input Buffer
Capacitance
Input Hysteresis
Internal PIO Pull-up
Current
IL
and V
iCE40 Product Family Qualification Summary
Power-On-Reset ramp-up trip point (circuit monitoring
V
Power-On-Reset ramp-down trip point (circuit monitor-
ing V
Parameter
CC
Power supply ramp rates for all
, V
IH
2
CC
in the sysIO Single-Ended DC Electrical Characteristics table of this document.
CCIO_2
, V
2
CCIO_2
power supplies.
Parameter
, V
CC_SPI
Over Recommended Operating Conditions
, V
CC_SPI
0V < V
V
V
V
V
V
V
V
V
1, 2
and V
IN
CCIO
CC
CCIO
CC
CCIO
CCIO
CCIO
CCIO
is larger then V
and V
= Typ., V
= Typ., V
PP_2V5
= 3.3V, 2.5V, 1.8V
= 3.3V, 2.5V, 1.8V
= 1.8V, 2.5V, 3.3V
= 1.8V, 0=<V
= 2.5V, 0=<V
= 3.3V, 0=<V
IN
1, 2
< V
Parameter
PP_2V5
CCIO
)
IO
IO
All configuration modes. No power
supply sequencing.
Configuring from NVCM. V
V
before V
Configuring from MSPI. V
V
before V
Condition
= 0 to V
= 0 to V
)
CCIO
PP_2V5
PP_SPI
+ 0.2V
3-2
IN
IN
IN
.
<=0.65 V
<=0.65 V
<=0.65 V
CCIO
CCIO
CC_SPI
to be powered 0.25ms
PP_2V5
to be powered 0.25ms
for complete qualification data, including ESD per-
+ 0.2V
+ 0.2V
CCIO
CCIO
CCIO
.
.
V
V
V
V
V
V
V
V
DC and Switching Characteristics
CC
CCIO_2
CC_SPI
PP_2V5
CC
CCIO_2
CC_SPI
PP_2V5
iCE40 LP/HX Family Data Sheet
CC
CC
and
and
Min.
-11
—
—
—
—
-3
-8
Min.
Typ.
Min.
0.40
0.01
0.01
0.55
0.86
0.86
0.86
200
—
—
—
—
—
—
—
—
6
6
+/-10
Max.
Max.
Max.
-128
0.75
1.29
1.29
1.33
0.75
1.29
1.29
1.33
-31
-72
10
10
10
—
—
—
Units
Units
Units
V/ms
V/ms
V/ms
mV
µA
µA
µA
µA
pf
pf
V
V
V
V
V
V
V
V