iCE40LP1K-CM121 Lattice, iCE40LP1K-CM121 Datasheet - Page 22

• Manufacturer Part Number: iCE40LP1K-CM121
• Description: FPGA - Field Programmable Gate Array iCE40LP 1280 LUTs, 1.2V Ultra Low-Power
• Manufacturer: Lattice

Specifications of iCE40LP1K-CM121

• Rohs: yes
• Number Of Gates: 1280
• Number Of Logic Blocks: 16
• Number Of I/os: 95
• Maximum Operating Frequency: 533 MHz
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: CBGA-121
• Distributed Ram: 64 Kbit
• Minimum Operating Temperature: - 40 C
• Factory Pack Quantity: 490

SubLVDS Emulation
The iCE40 family supports the differential subLVDS standard. The output standard is emulated using complemen-
tary LVCMOS outputs in conjunction with resistors across the driver outputs on all banks of the devices. The sub-
LVDS input standard is supported by the LVDS25 differential input buffer. The scheme shown in Figure 3-2 is one
possible solution for subLVDSE output standard implementation. Use LVDS25E mode with suggested resistors for
subLVDSE operation. Resistor values in Figure 3-2 are industry standard values for 1% resistors.
Figure 3-2. subLVDSE
Table 3-2. subLVDSE DC Conditions
Output Pair
V
Differential
Z
R
R
R
V
V
V
V
Z
I
CCIO
DC
OUT
OH
OL
OD
BACK
T
CM
S
P
Parameter
Over Recommended Operating Conditions
R
R
s
s
Output impedance
Driver series resistor
Driver parallel resistor
Receiver termination
Output high voltage
Output low voltage
Output differential voltage
Output common mode voltage
Back impedance
DC output current
1%
R
p
V
V
OUT_B
OUT_A
Description
Output common mode voltage
50%
3-9
DC and Switching Characteristics
V
OCM
iCE40 LP/HX Family Data Sheet
GND
100.5
Typ.
1.43
1.07
0.35
6.03
270
120
100
0.9
20
output voltage
Differential
Ohms
Ohms
Ohms
Ohms
Ohms
Units
mA
V
V
V
V
V
OD