iCE40LP1K-CM121 Lattice, iCE40LP1K-CM121 Datasheet - Page 2

• Manufacturer Part Number: iCE40LP1K-CM121
• Description: FPGA - Field Programmable Gate Array iCE40LP 1280 LUTs, 1.2V Ultra Low-Power
• Manufacturer: Lattice

Specifications of iCE40LP1K-CM121

• Rohs: yes
• Number Of Gates: 1280
• Number Of Logic Blocks: 16
• Number Of I/os: 95
• Maximum Operating Frequency: 533 MHz
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: CBGA-121
• Distributed Ram: 64 Kbit
• Minimum Operating Temperature: - 40 C
• Factory Pack Quantity: 490

Table 1-1. iCE40 Family Selection Guide
April 2013
Features
 Flexible Logic Architecture
 Ultra Low Power Devices
 Embedded and Distributed Memory
 Pre-Engineered Source Synchronous I/O
 High Performance, Flexible I/O Buffer
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Logic Cells (LUT + Flip-Flop)
RAM4K Memory Blocks
RAM4K RAM bits
Phase-Locked Loops (PLLs)
Maximum Programmable I/O Pins
Maximum Differential Input Pairs
32 QFN
(5 x 5mm, 0.5mm)
36 ucBGA
(2.5 x 2.5mm, 0.4mm)
49 ucBGA
(3 x 3mm, 0.4mm)
81 ucBGA
(4 x 4mm, 0.4mm)
81 csBGA
(5 x 5mm, 0.5mm)
84 QFN
(7 x 7mm, 0.5mm)
• Four devices with 384 to 7,680 LUT4s and 
• Advanced 40 nm low power process
• As low as 25 µW standby power
• Programmable low swing differential I/Os
• Up to 128 Kbits sysMEM™ Embedded Block
• DDR registers in I/O cells
• Programmable sysIO™ buffer supports wide
• Programmable pull-up mode
Package
21 to 206 I/Os
RAM
range of interfaces:
– LVCMOS 3.3/2.5/1.8
– LVDS25E, subLVDS
– Schmitt trigger inputs, to 200 mV typical
Part Number
hysteresis
CM36
CM49
CM81
Code
SG32
CB81
QN84
LP384
21(4)
25(3)
37(6)
55(3)
384
63
0
0
0
8
iCE40 LP/HX Family Data Sheet
25(3)
62(9)
67(7)
LP1K
1,280
35(5)
63(8)
64K
16
95
12
1
1
1
1
1
Programmable I/O: Max Inputs (LVDS25)
1-1
 Flexible On-Chip Clocking
 Flexible Device Configuration
 Broad Range of Package Options
63(9)
LP4K
3,520
80K
167
20
20
2
2
• Eight low-skew global clock resources
• Up to two analog PLLs per device
• SRAM is configured through:
• QFN, VQFP, TQFP, ucBGA, caBGA, and csBGA
• Small footprint package options
• Advanced halogen-free packaging
2
package options
– Standard SPI Interface
– Internal Nonvolatile Configuration Memory
– As small as 2.5x2.5mm
(NVCM)
63(9)
LP8K
7,680
128K
178
32
23
2
2
HX1K
1,280
64K
16
95
11
1
1
Introduction
DS1040
HX4K
3,520
80K
Data Sheet DS1040
20
95
12
2
Introduction_01.1
HX8K
7,680
128K
206
32
26
2