S25FL128SDPMFIG11 Spansion, S25FL128SDPMFIG11 Datasheet - Page 148

• Manufacturer Part Number: S25FL128SDPMFIG11
• Description: Flash 128Mb 3V 66MHz Serial NOR Flash
• Manufacturer: Spansion

Specifications of S25FL128SDPMFIG11

• Rohs: yes
• Data Bus Width: 1 bit
• Memory Type: Flash
• Memory Size: 128 Mbit
• Architecture: Uniform
• Timing Type: Asynchronous
• Interface Type: SPI
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Maximum Operating Current: 100 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SO-16

11.4
148
Initial Delivery State
The device is shipped from Spansion with non-volatile bits set as follows:
 The entire memory array is erased: i.e. all bits are set to 1 (each byte contains FFh).
 The OTP address space has the first 16 bytes programmed to a random number. All other bytes are erased
 The ID-CFI address space contains the values as defined in the description of the ID-CFI address space.
 The Status Register 1 contains 00h (all SR1 bits are cleared to 0’s).
 The Configuration Register 1 contains 00h.
 The Autoboot register contains 00h.
 The Password Register contains FFFFFFFF-FFFFFFFFh
 All PPB bits are 1.
 The ASP Register contents depend on the ordering options selected:
7 to 0
7 to 0
Bits
Bits
to FFh.
Field Name
Field Name
NVDLP
VDLP
00, 20, 30, R0, A0, B0, C0, D0,
01, 21, 31, R1, A1, B1, C1, D1,
Ordering Part Number Model
M0, N0, U0, V0, W0, X0,
M1, N1, U1, V1, W1, X1
K0, L0. S0, T0, Y0, Z0,
K1, L1. S1, T1, Y1, Z1,
90, Q0, 70, 60, 80,
91, Q1, 71, 61, 81
Data Learning
Volatile Data
Non-Volatile
Function
Function
Learning
Pattern
Pattern
Table 11.28 Non-Volatile Data Learning Register (NVDLR)
Table 11.29 Volatile Data Learning Register (NVDLR)
S25FL128S and S25FL256S
Volatile
Type
Type
OTP
Table 11.30 ASP Register Content
Default State
Default State
during POR
Takes the
D a t a
or Reset
value of
NVDLR
00h
S h e e t
OTP value that may be transferred to the host during DDR read
command latency (dummy) cycles to provide a training pattern to
help the host more accurately center the data capture point in the
received data bits.
Volatile copy of the NVDLP used to enable and deliver the Data
Learning Pattern (DLP) to the outputs. The VDLP may be changed
by the host during system operation.
S25FL128S_256S_00_05 July 12, 2012
ASPR Default Value
Description
Description
FE7Fh
FE4Fh