TSS461F-TDRZ-9 Atmel, TSS461F-TDRZ-9 Datasheet - Page 26

• Manufacturer Part Number: TSS461F-TDRZ-9
• Description: Network Controller & Processor ICs Van Data Link Controller
• Manufacturer: Atmel

Diagnosis Control
Register (0x02)
SDC [3:0]: SDC divider
26
TSS461F
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The diagnosis is discussed in detail in section “Diagnosis States”.
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The input clock is the times lot clock.
Table 6. System Diagnosis Clock Divider
SDC3
Read/Write register
Default value after reset: 0x00.
In its four high order bits the user can program the SDC rate SDC [3:0]
In its two medium order bits the diagnosis system mode is controlled: M1, M0
In the two low order bits, the user controls if the SDC and TIP are to be generated
automatically ETIP, ESDC
7
SDC2
6
SDC Divider SDC [3:0]
SDC1
5
0000
0001
0010
0011
0100
0101
0110
1000
1001
1010
1011
1100
1101
0111
1110
1111
SDC0
4
Ma
3
Mb
2
ETIP
Divide By
1048576
2097152
1
131072
262144
524288
16384
32768
65536
1024
2048
4096
8192
128
256
512
64
ESDC
7615A–AUTO–02/06
0