TSS461F-TDRZ-9 Atmel, TSS461F-TDRZ-9 Datasheet - Page 7

• Manufacturer Part Number: TSS461F-TDRZ-9
• Description: Network Controller & Processor ICs Van Data Link Controller
• Manufacturer: Atmel

Motorola Mode
Interrupts
7615A–AUTO–02/06
Figure 3. Intel Read and Write Cycles
In Motorola mode, the WR pin becomes the R/W command, the RD pin must be connected to
ground and the CS pin becomes the E strobe. There is no separate chip select input. For exam-
ple, if some external decoder is used, this decoder should not drive the E input high unless the
processors E output is high as well.
See Figure 4 for the Motorola read and write cycles. The main difference between Intel and
Motorola mode is that the timing in Intel mode is referenced to the command signals (RD and
WR), but in Motorola mode the reference is the E signal.
Figure 4. Motorola Read and Write Cycles
If an event occurs in the TSS461F, that needs the attention of the processor, this will be sig-
nalled on the active low, open-drain interrupt request pin. The events that create this request is
controlled by the internal registers.
Every time the microprocessor accesses any of the interrupt registers (addresses 0x08 to 0x0B),
the INT pin will be released momentarily. This enables the TSS461F to work with processors
that have either edge or level sensitive interrupt inputs.
R/W (WR)
ALE
AD[7:0]
RD
WR
CS
ALE
AD[7:0]
VSS (RD)
E (CS)
ADDRESS
ADDRESS
WRITE CYCLE
WRITE CYCLE
DATA TO BE
WRITTEN
DATA TO BE
WRITTEN
ADDRESS
ADDRESS
READ CYCLE
READ CYCLE
DATA
READ
DATA
READ
TSS461F
7