TSS461F-TDRZ-9 Atmel, TSS461F-TDRZ-9 Datasheet - Page 34

no-image

TSS461F-TDRZ-9

Manufacturer Part Number
TSS461F-TDRZ-9
Description
Network Controller & Processor ICs Van Data Link Controller
Manufacturer
Atmel
Datasheet
RSTR: Reset Interrupt
Reset
TER: Transmit Error
Status Flag Reset
TOKR: Transmit OK
Status Flag Reset
RER: Receive Error
Status Flag Reset
ROKR: Receive “with
RAK” OK Status Flag
Reset
RNOKR: Receive “with
no RAK” OK Status Flag
Reset
Figure 21. Update of the Status Register
Channel Registers
34
TSS461F
BUS
INT
4 TS
One: Status flag reset
Zero: Status flag unchanged
There is a total of 14 channel register sets, each occupying 8 bytes for addressing simplicity,
integrated into the circuit. Each set contains two 2 x 8-bit registers for the indentifier tag, indenti-
fier mask and command fields plus two 1 x 8-bit registers for DMA pointers and message status.
The base_address of each set is: (0x10 + [0x08 * channel_number]).
When the TSS461F is reset either via the external reset pin or the general reset command, the
channel registers are not affected. For example, on power-up of the circuit, all the channel regis-
ters start with random values.
Due to this fact, the user should take care to initialize all the channel registers before exiting
from idle mode. The easiest way to disable a channel register is to set the received and transmit-
ted bits to 1 in the Message Length & Status Register.
SOF
ID+COM+DATA+CRC
Write “Message Status”
1 to 2 TS
4 TS
Write “Message Length & Status Register”
6 TS
Write “Last Message Register”
Write “Last Error Register”
Line Status Register (0x04)
Write “IT Status Register”
7615A–AUTO–02/06

Related parts for TSS461F-TDRZ-9