XRT83SL216ES Exar, XRT83SL216ES Datasheet

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XRT83SL216ES

Manufacturer Part Number
XRT83SL216ES
Description
Peripheral Drivers & Components - PCIs 16 CH E1 LIU SH
Manufacturer
Exar
Datasheet

Specifications of XRT83SL216ES

Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
AUGUST 2006
GENERAL DESCRIPTION
The XRT83SL216 is a fully integrated 16-channel E1
short-haul LIU which optimizes system cost and
performance by offering key design features. The
XRT83SL216 operates from a single 3.3V power
supply. The LIU features are programmed through a
standard serial microprocessor interface. EXAR’s LIU
has patented high impedance circuits that allow the
transmitter outputs and receiver inputs to be placed in
a high impedance mode when experiencing a power
failure or when the LIU is powered off. Additional
features include TAOS for transmit and receive,
RLOS, LCV, on chip Jitter Attenuator, AIS detector,
and diagnostic loopback modes.
Exar
F
IGURE
RNEG/LCV
Corporation 48720 Kato Road, Fremont CA, 94538
TPOS
TNEG
TCLK
RCLK
RPOS
RLOS
1. B
TMS
TCK
TDI
LOCK
D
IAGRAM OF THE
JTAG
1 of 16 Channels
Decoder
Encoder
HDB3
HDB3
Loopback
Remote
XRT83SL216
Attenuator
(Rx or Tx)
Serial Microprocessor
Jitter
16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
Interface
Loopback
Digital
Clock & Data
AIS & LOS
Recovery
Detector
Control
Timing
(510) 668-7000
APPLICATIONS
Stations
CSU/DSU E1 Interface
E1 LAN/WAN Routers
Public Switching Systems and PBX Interfaces
E1 Multiplexer and Channel Banks
Integrated Multi-Service Access Platforms (IMAPs)
Integrated Access Devices (IADs)
Inverse Multiplexing for ATM (IMA) Wireless Base
ISDN Primary Rate Interface
Tx Pulse
Detector
& Slicer
Shaper
Peak
Internal Clock Generator
FAX (510) 668-7017
Equalizer
Driver
Line
Rx
Loopback
Analog
XRT83SL216
www.exar.com
REV. 1.0.0
TxOE
TTIP
TRING
RTIP
RRING
JASEL0
JASEL1

Related parts for XRT83SL216ES

XRT83SL216ES Summary of contents

Page 1

... The XRT83SL216 operates from a single 3.3V power supply. The LIU features are programmed through a standard serial microprocessor interface. EXAR’s LIU has patented high impedance circuits that allow the transmitter outputs and receiver inputs to be placed in a high impedance mode when experiencing a power failure or when the LIU is powered off ...

Page 2

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT FEATURES • Fully integrated 16-Channel short haul transceivers for E1 (2.048MHz) applications • Tri-State on a per channel basis for the transmit selection • Crystal-Less digital jitter attenuators (JA) with 32-Bit or 64-Bit ...

Page 3

REV. 1.0 XRT83SL216 ( IGURE IN UT FOR THE (See pin list for pin names and function 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT ) BOTTOM VIEW XRT83SL216 ...

Page 4

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT GENERAL DESCRIPTION ................................................................................................ 1 APPLICATIONS .......................................................................................................................................... XRT83SL216 ........................................................................................................................... 1 IGURE LOCK IAGRAM OF THE ..................................................................................................................................................... 2 FEATURES PRODUCT ORDERING INFORMATION ................................................................................................. XRT83SL216 ( ...

Page 5

REV. 1.0.0 The following Ferrite Bead is Recommended for Use .............................................................................................. 24 The following Transformer is Recommended for Use .............................................................................................. 25 4.0 SERIAL MICROPROCESSOR INTERFACE BLOCK ........................................................................... IGURE IMPLIFIED LOCK IAGRAM OF THE F ...

Page 6

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT PIN DESCRIPTIONS HOST MODE INTERFACE SERIAL MICROPROCESSOR INTERFACE AME IN YPE SCLK J5 I SDI K5 I SDO L5 O Reset J6 I INT ...

Page 7

REV. 1.0.0 RECEIVER SECTION AME IN YPE RLOS15 B10 O RLOS14 D11 RLOS13 F10 RLOS12 B12 RLOS11 T12 RLOS10 T11 RLOS9 M10 RLOS8 R10 RLOS7 U8 RLOS6 R7 RLOS5 M8 RLOS4 T6 RLOS3 B6 RLOS2 B7 RLOS1 ...

Page 8

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT RECEIVER SECTION AME IN YPE RPOS15 C10 O RPOS14 C11 RPOS13 E11 RPOS12 C12 RPOS11 R12 RPOS10 R11 RPOS9 M11 RPOS8 T10 RPOS7 R8 RPOS6 T7 RPOS5 N7 RPOS4 R6 ...

Page 9

REV. 1.0.0 RECEIVER SECTION AME IN YPE RTIP15 B17 I RTIP14 D17 RTIP13 F17 RTIP12 H17 RTIP11 K17 RTIP10 M17 RTIP9 P17 RTIP8 T17 RTIP7 T1 RTIP6 P1 RTIP5 M1 RTIP4 K1 RTIP3 H1 RTIP2 F1 RTIP1 ...

Page 10

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT TRANSMITTER SECTION AME IN YPE TxOE K14 I TCLK15 A14 I TCLK14 D13 TCLK13 C14 TCLK12 E14 TCLK11 N14 TCLK10 P13 TCLK9 U16 TCLK8 R13 TCLK7 R5 TCLK6 U2 TCLK5 ...

Page 11

REV. 1.0.0 TRANSMITTER SECTION AME IN YPE TNEG15 A13 I TNEG14 C13 TNEG13 B14 TNEG12 D14 TNEG11 L14 TNEG10 M13 TNEG9 U14 TNEG8 U13 TNEG7 U5 TNEG6 U4 TNEG5 M5 TNEG4 L4 TNEG3 C4 TNEG2 A4 TNEG1 ...

Page 12

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT TRANSMITTER SECTION AME IN YPE TTIP15 B15 O TTIP14 D15 TTIP13 F15 TTIP12 H15 TTIP11 K15 TTIP10 M15 TTIP9 P15 TTIP8 T14 TTIP7 T4 TTIP6 P3 TTIP5 M3 TTIP4 K3 ...

Page 13

REV. 1.0.0 CONTROL FUNCTION AME IN YPE JASEL0 G13 I JASEL1 H13 MCLK L6 I JTAG SECTION AME IN YPE TCK G5 I TDI G4 I TDO H5 O TMS G6 I TRST H4 ...

Page 14

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT POWER AND GROUND AME IN YPE TVDD15 C16 PWR TVDD14 E16 TVDD13 G16 TVDD12 J16 TVDD11 L16 TVDD10 N16 TVDD9 R16 TVDD8 P14 TVDD7 P4 TVDD6 R2 TVDD5 N2 TVDD4 ...

Page 15

REV. 1.0.0 POWER AND GROUND AME IN YPE TGND15 B16 GND TGND14 D16 TGND13 F16 TGND12 H16 TGND11 K16 TGND10 M16 TGND9 P16 TGND8 T15 TGND7 T3 TGND6 P2 TGND5 M2 TGND4 K2 TGND3 H2 TGND2 F2 ...

Page 16

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT POWER AND GROUND AME IN YPE AGND G7 GND G8 G9 G10 G11 H10 H11 J10 J11 K10 K11 L7 L8 ...

Page 17

REV. 1.0.0 1.0 RECEIVE PATH LINE INTERFACE The receive path consists of 16 independent E1 receivers. The following section describes the complete receive path from RTIP/RRING inputs to RCLK/RPOS/RNEG outputs. A simplified block diagram of the receive path is shown ...

Page 18

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT ABLE P ARAMETER RCLK Duty Cycle Receive Data Setup Time Receive Data Hold Time RCLK to Data Delay RCLK Rise Time (10% to 90%) with 25pF Loading RCLK Fall Time ...

Page 19

REV. 1.0.0 1.4.1 RLOS (Receiver Loss of Signal) The XRT83SL216 supports both G.775 or ETSI-300-233 RLOS detection scheme. In G.775 mode, RLOS is declared when the received signal is less than 320mV for more than 32 consecutive pulse periods (typical). ...

Page 20

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT 1.7 ARAOS (Automatic Receive All Ones) If ARAOS is enabled in the appropriate channel register and an RLOS condition occurs, the Receiver outputs will generate an All Ones pattern using MCLK as reference. ...

Page 21

REV. 1.0.0 2.0 TRANSMIT PATH LINE INTERFACE The transmit path consists of 16 independent E1 transmitters. The following section describes the complete transmit path from TCLK/TPOS/TNEG inputs to TTIP/TRING outputs. A simplified block diagram of the transmit path is shown ...

Page 22

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT ABLE P ARAMETER TCLK Duty Cycle Transmit Data Setup Time Transmit Data Hold Time TCLK Rise Time (10% to 90%) TCLK Fall Time (90 VDD=3.3V ±5%, ...

Page 23

REV. 1.0.0 2.4 TAOS (Transmit All Ones) The XRT83SL216 has the ability to transmit all ones on a per channel basis by programming the appropriate channel register. If TAOS is enabled, the Transmitter outputs will generate an All Ones pattern ...

Page 24

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT 3.0 APPLICATIONS This applications section describes system considerations along with references to application notes available for reference where applicable. 3.1 Loopback Diagnostics The XRT83SL216 supports several loopback modes for diagnostic testing. The following ...

Page 25

REV. 1.0.0 3.1.3 Digital Loopback With digital loopback activated, the transmit input data at TCLK/TPOS/TNEG is looped back to the receive output data at RCLK/RPOS/RNEG. The receive input data at RTIP/RRING is ignored while valid transmit output data continues to ...

Page 26

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT F 19. XRT83L216 IGURE INTERFACING THE 120 Ω Twisted Pair 2 :1 120 Ω Signal Source 120 Ω Twisted Pair Load 120 Ω FOLLOWING ...

Page 27

REV. 1.0 FOLLOWING RANSFORMER ART UMBER ENDOR T1113 Pulse Magnetic Supplier Information Supplier Information PULSE Corporate Office 12220 World Trade Drive San Diego, CA 92128 Tel: (619)-674-8100 FAX: (619)-674-8262 16-CHANNEL E1 SHORT-HAUL ...

Page 28

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT 4.0 SERIAL MICROPROCESSOR INTERFACE BLOCK The serial microprocessor uses a standard 3-pin serial port with CS, SCLK, and SDI for programming the LIU. Optional pins such as SDO, INT, and RESET allow the ...

Page 29

REV. 1.0 IGURE IMING IAGRAM FOR THE SCLK SDI R/W CS SCLK SDO D0 Hi-Z Don’t Care (Read mode) SDI ABLE ICROPROCESSOR ...

Page 30

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT T ABLE R ADDR YPE Global Control Register for All 16 Channels (0x00h) 0 0x00 R/W GIE Reserved 1 0x01 RO INTS7 INTS6 2 0x02 RO INTS15 INTS14 Revision ...

Page 31

REV. 1.0.0 T ABLE R ADDR YPE 24 0x18 R/W SRES_6 * ARAOS_6 25 0x19 R/W Reserved AISIE_6 26 0x1A RUR/ Reserved AISIS_6 RO Channel 7 Control Register (0x19h - 0x1Bh) 27 0x1B R/W SRES_7 * ...

Page 32

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT T ABLE R ADDR YPE Channel 14 Control Register (0x2Eh - 0x30h) 48 0x30 R/W SRES_14 * ARAOS_14 49 0x31 R/W Reserved AISIE_14 50 0x32 RUR/ Reserved AISIS_14 RO ...

Page 33

REV. 1.0 ABLE G LOBAL AME D2 JABW JA Band width Select This bit is used to select the band with of the JA PLL. "0" "1" = 1.5Hz N : ...

Page 34

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT ABLE AME D7 Revision The revision "ID" of the XRT83SL216 LIU is used to enable soft- "ID" ware to identify which revision of silicon is currently being ...

Page 35

REV. 1.0.0 T 11: M ABLE C HANNEL ( AME D5 ATAOS_n ...

Page 36

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT T 12: M ABLE C HANNEL ( AME ...

Page 37

REV. 1.0.0 T 13: M ABLE C HANNEL ( AME D5 DMOIS_n Driver Monitor Output ...

Page 38

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT ELECTRICAL CHARACTERISTICS Storage Temperature Operating Temperature Supply Voltage T 15 ABLE VDD=3.3V ±5 ARAMETER Power Supply Voltage Input High Voltage Input Low Voltage Output High Voltage IOH=2.0mA Output Low ...

Page 39

REV. 1.0.0 T ABLE VDD=3.3V ±5 ARAMETER Receiver Loss of Signal Number of consecutive zeros before RLOS is declared Input signal level at RLOS RLOS clear Receiver Sensitivity (flat loss only) Interference Margin Input Impedance Input Jitter Tolerance ...

Page 40

XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT T 19 ABLE VDD=3.3V ±5 ARAMETER AMI Output Pulse Amplitude 75 Ω 120 Ω Output Pulse Width Output Pulse Width Ratio Output Pulse Amplitude Ratio Jitter Added by the ...

Page 41

REV. 1.0.0 ORDERING INFORMATION P N RODUCT UMBER XRT83SL216IB PACKAGE DIMENSIONS F 23 289 STBGA IGURE X MM BALL SYMBOL 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT P ACKAGE 289 ball STBGA Note: The control dimension is in millimeter. ...

Page 42

... Removed TBD’s from electrical, removed preliminary and updated document format. Added timing diagram and timing info for the microprocessor serial interface. EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement ...

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