XRT83SL216ES Exar, XRT83SL216ES Datasheet - Page 18

no-image

XRT83SL216ES

Manufacturer Part Number
XRT83SL216ES
Description
Peripheral Drivers & Components - PCIs 16 CH E1 LIU SH
Manufacturer
Exar
Datasheet

Specifications of XRT83SL216ES

Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
XRT83SL216
16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
N
To meet short haul requirements, the XRT83SL216 can accept E1 signals that have been attenuated by 11dB
of flat loss in E1 mode. The test configuration for measuring the receive sensitivity is shown in
F
The receive path detects RLOS and AIS. These alarms can be individually masked to prevent the alarm from
triggering an interrupt. To enable interrupt generation, the Global Interrupt Enable (GIE) bit must be set "High"
in the appropriate global register. Any time a change in status occurs (if the alarms are enabled), the interrupt
pin will pull "Low" to indicate an alarm has occurred. Once the status registers have been read, the INT pin will
return "High". The status registers are Reset Upon Read (RUR).
N
1.3
1.4
OTE
IGURE
OTE
RCLK Rise Time (10% to 90%)
RCLK Fall Time (90% to 10%)
Receive Data Setup Time
Receive Data Hold Time
: VDD=3.3V ±5%, T
: The interrupt pin is an Open-Drain output that requires a 10k Ω pull-up resistor.
E1 = PRBS 2
RCLK to Data Delay
with 25pF Loading
with 25pF Loading
6. T
RCLK Duty Cycle
Receive Sensitivity
General Alarm Detection and Interrupt Generation
Analyze r
Ne twork
P
ARAMETER
EST
15
C
- 1
ONFIGURATION FOR
A
Tx
Rx
=25°C, Unless Otherwise Specified
T
ABLE
1: T
S
RCLK
RCLK
R
IMING
YMBOL
M
R
R
R
CDU
HO
EASURING
SU
DY
R
F
Flat Loss
S
PECIFICATIONS FOR
R
ECEIVE
M
150
150
16
45
-
-
-
IN
S
ENSITIVITY
RCLK/RPOS/RNEG
Rx
Tx
T
50
YP
-
-
-
-
-
Short Haul LIU
XRT83SL216
16-Channe l
M
55
40
40
40
AX
-
-
Exte rnal Loopback
Figure
U
REV. 1.0.0
NITS
ns
ns
ns
ns
ns
%
6.

Related parts for XRT83SL216ES