XRT83SL216ES Exar, XRT83SL216ES Datasheet - Page 20
XRT83SL216ES
Manufacturer Part Number
XRT83SL216ES
Description
Peripheral Drivers & Components - PCIs 16 CH E1 LIU SH
Manufacturer
Exar
Datasheet
1.XRT83SL216ES.pdf
(42 pages)
Specifications of XRT83SL216ES
Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
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XRT83SL216
16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
If ARAOS is enabled in the appropriate channel register and an RLOS condition occurs, the Receiver outputs
will generate an All Ones pattern using MCLK as reference. When RLOS clears, the All Ones pattern ends and
the Receive path returns to normal operation.
The digital output data can be programmed to either single rail or dual rail formats.
of a repeating "0011" pattern in single-rail mode.
rail mode.
F
F
F
1.7
1.8
IGURE
IGURE
IGURE
7. S
8. S
9. D
ARAOS (Automatic Receive All Ones)
RPOS/RNEG/RCLK
RCLK
RPOS
IMPLIFIED
INGLE
RNEG
UAL
RCLK
RPOS
R
AIL
R
AIL
B
M
LOCK
M
ODE
ODE
W
0
D
W
0
ITH A
IAGRAM OF THE
ITH A
Timing derived
F
from MCLK
IXED
F
RNEG
IXED
RPOS
ARAOS
RLOS
R
0
R
EPEATING
0
EPEATING
ARAOS F
Generator
All "1's"
Figure 9
18
"0011" P
"0011" P
UNCTION
is a timing diagram of the same fixed pattern in dual
1
1
ATTERN
ATTERN
Rx
1
1
Figure 8
0
is a timing diagram
0
REV. 1.0.0
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