P5010NXE1QMB Freescale Semiconductor, P5010NXE1QMB Datasheet - Page 112

• Manufacturer Part Number: P5010NXE1QMB
• Description: Processors - Application Specialized P5010 Ext TmpEnc 1600/1200 r2.0
• Manufacturer: Freescale Semiconductor

Specifications of P5010NXE1QMB

• Rohs: yes

For recommended operating conditions, see
Differential peak-to-peak
output voltage
Low Power differential
peak-to-peak output voltage
De-emphasized differential
output voltage (ratio)
De-emphasized differential
output voltage (ratio)
DC differential Tx
impedance
Transmitter DC Impedance Z
Note:
1. Measured at the package pins with a test load of 50Ω to GND on each pin.
For recommended operating conditions, see
Differential input
peak-to-peak voltage
DC differential input
impedance
Table 65. PCI Express 2.0 (2.5 GT/s) Differential Receiver (Rx) Input DC Specifications (SV
Electrical Characteristics
This table defines the PCI Express 2.0 (5 GT/s) DC specifications for the differential output at all transmitters. The parameters
are specified at the component pins.
2.20.4.4
This section discusses the PCI Express DC physical layer receiver specifications 2.5 GT/s, and 5 GT/s
This table defines the DC specifications for the PCI Express 2.0 (2.5 GT/s) differential input at all receivers. The parameters are
specified at the component pins.
112
Parameter
Parameter
Table 64. PCI Express 2.0 (5 GT/s) Differential Transmitter (Tx) Output DC Specifications
PCI Express DC Physical Layer Receiver Specifications
V
V
V
V
Z
TX-DIFF-DC
TX-DC
TX-DIFFp-p
TX-DIFFp-p_low
TX-DE-RATIO-3.5dB
TX-DE-RATIO-6.0dB
P5020/P5010 QorIQ Integrated Processor Hardware Specifications, Rev. 0
Symbol
Z
V
RX-DIFF-DC
Symbol
RX-DIFFp-p
Table
Table
3.
3.
Min
800
400
3.0
5.5
80
40
Min
120
80
(XV
Typical
DD
500
100
3.5
6.0
50
—
= 1.5 V or 1.8 V)
Typ
100
—
1200
1200
Max
120
4.0
6.5
60
Unit
mV
mV
1200
dB
dB
Max
120
Ω
Ω
V
V
Ratio of the V
bits after a transition divided by the V
first bit after a transition. See Note 1.
Ratio of the V
bits after a transition divided by the V
first bit after a transition. See Note 1.
Tx DC differential mode low impedance
Required Tx D+ as well as D– DC impedance during
all states
Unit
TX-DIFFp-p
TX-DIFFp-p
mV V
Ω
See Note 1.
Rx DC differential mode impedance.
See Note 2
RX-DIFFp-p
= 2 × |V
= 2 × |V
TX-DIFFp-p
TX-DIFFp-p
TX-D+
TX-D+
= 2 × |V
Freescale Semiconductor
Note
of the second and following
of the second and following
DD
– V
– V
Note
RX-D+
= 1.5 V or 1.8 V)
TX-D-
TX-D-
– V
| See Note 1.
| See Note 1.
TX-DIFFp-p
TX-DIFFp-p
RX-D-
|
of the
of the