ST62E32BF1 STMicroelectronics, ST62E32BF1 Datasheet - Page 40

• Manufacturer Part Number: ST62E32BF1
• Description: 8-bit Microcontrollers - MCU UV EPROM 8K SPI/UART
• Manufacturer: STMicroelectronics

Specifications of ST62E32BF1

• Product Category: 8-bit Microcontrollers - MCU
• Core: ST6
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Program Memory Size: 7948 B
• Data Ram Size: 192 B
• On-chip Adc: Yes
• Package / Case: SDIP-42
• Mounting Style: Through Hole
• A/d Bit Size: 8 bit
• A/d Channels Available: 21
• Data Rom Size: 128 B
• Interface Type: SPI, UART
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Number Of Programmable I/os: 30
• Number Of Timers: 1 x 8 bit
• Program Memory Type: EPROM
• Factory Pack Quantity: 13
• Supply Voltage - Max: 5 V
• Supply Voltage - Min: 4.5 V

ST62T32B ST62E32B
I/O PORTS (Cont’d)
4.1.3 ARTimer alternate functions
As long as PWMEN (resp. OVFEN) bit is kept low,
the PA3/PWM (resp. PA2/OVF) pin is used as
standard I/O pin and therefore can be configured in
any mode through the DDR and OR registers.
If PWMEN (resp. OVFEN) bit is set, PA3/PWM (re-
sp. PA2/OVF) pin must be configured as output
through the DDR and OR registers to be used as
PWM (OVF) output of the ARTimer16. All output
modes are available.
PA4/CP1 or PA5/CP2 pins must be configured as
input through DDR register to allow CP1 or CP2
triggered input capture of the ARTimer16. All input
modes are available and I/O's can be read inde-
pendantly of the ARTimer at any time. As long as
RLDSEL2, RLDSEL1 bits do not enable CP1 or
CP2 triggered capture, PA4/CP1 and PA5/CP2 are
standard I/O's configurable through DDR and OR
registers.
4.1.4 SPI alternate functions
PD2/Sin and PD1/Scl pins must be configured as
input through the DDR and OR registers to be
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used as data in and data clock (Slave mode) for
the SPI. All input modes are available and I/O's
can be read independantly of the SPI at any time.
PD3/Sout must be configured in open drain output
mode to be used as data out for the SPI. In output
mode, the value present on the pin is the port data
register content only if PD3 is defined as push pull
output, while serial transmission is possible only in
open drain mode.
4.1.5 UART alternate functions
PD4/RXD1 pin must be configured as input
through the DDR and OR registers to be used as
reception line for the UART. All input modes are
available and PD4 can be read independantly of
the UART at any time.
PD5/TXD1 pin must be configured as output
through the DDR and OR registers to be used as
transmission line for the UART. Value present on
the pin in output mode is the Data register content
as long as no transmission is active.