C8051F314R Silicon Labs, C8051F314R Datasheet - Page 119

no-image

C8051F314R

Manufacturer Part Number
C8051F314R
Description
8-bit Microcontrollers - MCU 8KB 10ADC
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F314R

Product Category
8-bit Microcontrollers - MCU
Core
8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
8 KB
Data Ram Size
1.25 KB
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 3.6 V
Package / Case
LQFP-32
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
17
Data Rom Size
128 B
Interface Type
I2C, SMBus, SPI, UART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
29
Number Of Timers
5
On-chip Dac
No
Processor Series
C8051
Program Memory Type
Flash
Factory Pack Quantity
500
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
11. External RAM
The C8051F31x devices include 1024 bytes of RAM mapped into the external data memory space. All of
these address locations may be accessed using the external move instruction (MOVX) and the data
pointer (DPTR), or using MOVX indirect addressing mode. If the MOVX instruction is used with an 8-bit
address operand (such as @R1), then the high byte of the 16-bit address is provided by the External Mem-
ory Interface Control Register (EMI0CN as shown in SFR Definition 11.1). Note: the MOVX instruction is
also used for writes to the Flash memory. See
MOVX instruction accesses XRAM by default.
For a 16-bit MOVX operation (@DPTR), the upper 6-bits of the 16-bit external data memory address word
are "don't cares.” As a result, the 1024 byte RAM is mapped modulo style over the entire 64 k external
data memory address range. For example, the XRAM byte at address 0x0000 is shadowed at addresses
0x0400, 0x0800, 0x0C00, 0x1000, etc. This is a useful feature when performing a linear memory fill, as the
address pointer doesn't have to be reset when reaching the RAM block boundary.
Bits 7–2: UNUSED. Read = 000000b. Write = don’t care.
Bits 1–0: PGSEL: XRAM Page Select.
R/W
Bit7
SFR Definition 11.1. EMI0CN: External Memory Interface Control
The EMI0CN register provides the high byte of the 16-bit external data memory address
when using an 8-bit MOVX command, effectively selecting a 256-byte page of RAM. Since
the upper (unused) bits of the register are always zero, the PGSEL determines which page
of XRAM is accessed.
For Example: If EMI0CN = 0x01, addresses 0x0100 through 0x01FF will be accessed.
R/W
Bit6
R/W
Bit5
R/W
Bit4
Section “10. Flash Memory” on page 111
Rev. 1.7
R/W
Bit3
C8051F310/1/2/3/4/5/6/7
R/W
Bit2
R/W
Bit1
PGSEL
SFR Address:
R/W
Bit0
for details. The
0xAA
00000000
Reset Value
119

Related parts for C8051F314R