ST62T18CB6 STMicroelectronics, ST62T18CB6 Datasheet - Page 10

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ST62T18CB6

Manufacturer Part Number
ST62T18CB6
Description
8-bit Microcontrollers - MCU OTP EPROM 8K SPI/UAR
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST62T18CB6

Core
ST6
Data Bus Width
8 bit
Maximum Clock Frequency
8 MHz
Program Memory Size
7948 B
Data Ram Size
192 B
On-chip Adc
Yes
Operating Supply Voltage
3 V to 6 V
Package / Case
PDIP-20
Mounting Style
Through Hole
A/d Bit Size
8 bit
A/d Channels Available
7
Data Rom Size
64 B
Interface Type
UART
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
12
Number Of Timers
1
Program Memory Type
EPROM
Factory Pack Quantity
20
Supply Voltage - Max
6 V
Supply Voltage - Min
3.6 V

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ST62T18C/E18C
MEMORY MAP (Cont’d)
1.3.3 Data Space
Data Space accommodates all the data necessary
for processing the user program. This space com-
prises the RAM resource, the processor core and
peripheral registers, as well as read-only data
such as constants and look-up tables in Program
memory.
1.3.3.1 Data ROM
All read-only data is physically stored in program
memory, which also accommodates the Program
Space. The program memory consequently con-
tains the program code to be executed, as well as
the constants and look-up tables required by the
application.
The Data Space locations in which the different
constants and look-up tables are addressed by the
processor core may be thought of as a 64-byte
window through which it is possible to access the
read-only data stored in Program memory.
1.3.3.2 Data RAM
In ST62T18C and ST62E18C devices, the data
space includes 60 bytes of RAM, the accumulator
(A), the indirect registers (X), (Y), the short direct
registers (V), (W), the I/O port registers, the pe-
ripheral data and control registers, the interrupt
option register and the Data ROM Window register
(DRW register).
Additional RAM pages can also be addressed us-
ing banks of 64 bytes located between addresses
00h and 3Fh.
1.3.4 Stack Space
Stack space consists of six 12-bit registers which
are used to stack subroutine and interrupt return
addresses, as well as the current program counter
contents.
Table 3. Additional RAM Banks
10/82
10
ST62T18C/E18C
Device
2 x 64 bytes
RAM
Table 4. ST62T18C/E18C Data Memory Space
* WRITE ONLY REGISTER
ARTIMER STATUS/CONTROL REGISTER ARSC0
ARTIMER STATUS/CONTROL REGISTER ARSC1
ARTIMER RELOAD/CAPTURE REGISTER
TIMER 1 STATUS/CONTROL REGISTER
ARTIMER MODE/CONTROL REGISTER
I/O INTERRUPT POLARITY REGISTER
UART STATUS CONTROL REGISTER
TIMER 1 PRESCALER REGISTER
INTERRUPT OPTION REGISTER
PORT D DIRECTION REGISTER
DATA ROM WINDOW REGISTER
ARTIMER COMPARE REGISTER
PORT A DIRECTION REGISTER
PORT B DIRECTION REGISTER
ROM BANK SELECT REGISTER
RAM BANK SELECT REGISTER
TIMER 1 COUNTER REGISTER
UART DATA SHIFT REGISTER
. ARTIMER LOAD REGISTER
PORT D OPTION REGISTER
PORT A OPTION REGISTER
PORT B OPTION REGISTER
DATA ROM WINDOW AREA
A/D CONTROL REGISTER
PORT D DATA REGISTER
PORT A DATA REGISTER
PORT B DATA REGISTER
WATCHDOG REGISTER
A/D DATA REGISTER
DATA RAM BANKS
ACCUMULATOR
W REGISTER
X REGISTER
Y REGISTER
V REGISTER
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
DATA RAM
0DCh*
0C8h*
0C9h*
0CAh*
0CBh*
0CCh
0CDh
0CEh
0DAh
0DDh
0DEh
0ECh
OFFh
0BFh
0C0h
0C1h
0C2h
0C3h
0C4h
0C5h
0C6h
0C7h
0CFh
0D0h
0D1h
0D2h
0D3h
0D4h
0D5h
0D6h
0D7h
0D8h
0D9h
0E4h
0E5h
0E6h
0E7h
0E8h
0E9h
0EAh
0EBh
000h
03Fh
040h
07Fh
080h
081h
082h
083h
084h

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