ST62T18CB6 STMicroelectronics, ST62T18CB6 Datasheet - Page 31

• Manufacturer Part Number: ST62T18CB6
• Description: 8-bit Microcontrollers - MCU OTP EPROM 8K SPI/UAR
• Manufacturer: STMicroelectronics

Specifications of ST62T18CB6

• Core: ST6
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Program Memory Size: 7948 B
• Data Ram Size: 192 B
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 6 V
• Package / Case: PDIP-20
• Mounting Style: Through Hole
• A/d Bit Size: 8 bit
• A/d Channels Available: 7
• Data Rom Size: 64 B
• Interface Type: UART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 12
• Number Of Timers: 1
• Program Memory Type: EPROM
• Factory Pack Quantity: 20
• Supply Voltage - Max: 6 V
• Supply Voltage - Min: 3.6 V

INTERRUPTS (Cont’d)
Interrupt Polarity Register (IPR)
Address: DAh — Read/Write
In conjunction with I/O register ESB bit, the polarity
of I/O pins triggered interrupts can be selected by
setting accordingly the Interrupt Polarity Register
(IPR). If a bit in IPR is set to one the corresponding
port interrupt is inverted (e.g. IPR bit 2 = A; port C
Tables 11. I/O Interrupts selections according to IPR, IOR programming
7
-
GEN
1
1
1
1
1
1
1
1
0
GEN
1
1
1
1
0
-
IPR3
X
0
0
0
0
1
1
1
1
-
-
IPR1
0
0
1
1
X
IPR0
PortD
X
0
0
1
1
0
0
1
1
-
IOR5
X
0
1
0
1
0
1
0
1
PortA PortB
IOR6
X
0
1
0
1
0
Port B occurrence
falling edge
falling edge
falling edge
falling edge
rising edge
rising edge
rising edge
rising edge
Disabled
generates interrupt on rising edge. At reset, IPR is
cleared and all port interrupts are not inverted (e.g.
Port C generates interrupts on falling edges).
Bit 7 - Bit 4 = Unused .
Bit 3 = Port D Interrupt Polarity .
Bit 2 = Unused.
Bit 1= Port A Interrupt Polarity .
Bit 0 = Port B Interrupt Polarity .
Port A occurrence
falling edge
rising edge
high level
Disabled
low level
Port D occurrence
falling edge
falling edge
falling edge
falling edge
rising edge
rising edge
rising edge
rising edge
Disabled
ST62T18C/E18C
Interrupt
source
Interrupt
source
1
2
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