MT46H16M16LFBF-6 IT:A Micron Technology Inc, MT46H16M16LFBF-6 IT:A Datasheet - Page 53

• Manufacturer Part Number: MT46H16M16LFBF-6 IT:A
• Description: IC DDR SDRAM 256MBIT 60VFBGA
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46H16M16LFBF-6 IT:A

• Format - Memory: RAM
• Memory Type: Mobile DDR SDRAM
• Memory Size: 256M (16Mx16)
• Speed: 166MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 60-VFBGA
• Organization: 16Mx16
• Density: 256Mb
• Address Bus: 15b
• Access Time (max): 6.5/5ns
• Maximum Clock Rate: 166MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 100mA
• Pin Count: 60
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Compliant
• Other names: Q3368612

PDF: 09005aef82091978 / Source: 09005aef8209195b
MT46H16M16LF__2.fm - Rev. H 6/08 EN
10. READs or WRITEs listed in the Command (Action) column include READs or WRITEs with
11. Requires appropriate DM masking.
12. A WRITE command may be applied after the completion of the READ burst; otherwise, a
5.
6. All states and sequences not shown are illegal or reserved.
7. Not bank-specific; requires that all banks be idle, and bursts not be in progress.
8. May or may not be bank-specific; if multiple banks are to be precharged, each must have an
9. Not bank-specific; BURST TERMINATE affects the most recent READ burst, regardless of
LECT or NOP commands must be applied on each positive clock edge during these states.
open row.
bank.
auto precharge enabled and READs or WRITEs with auto precharge disabled.
BURST TERMINATE must be used to end the READ burst prior to asserting a WRITE com-
mand.
Refreshing
Accessing mode
register
all:
Precharging
: The following states must not be interrupted by any executable command; DESE-
Starts with registration of an AUTO REFRESH command and ends when
t
banks idle state.
Starts with registration of a LOAD MODE REGISTER command and ends
when
will be in the all banks idle state.
Starts with registration of a PRECHARGE ALL command and ends when
t
RFC is met. When
RP is met. When
t
MRD has been met. When
53
t
RP is met, all banks will be in the idle state.
t
Micron Technology, Inc., reserves the right to change products or specifications without notice.
RFC is met, the Mobile DDR SDRAM will be in the all
256Mb: x16, x32 Mobile DDR SDRAM
t
MRD is met, the Mobile DDR SDRAM
©2005 Micron Technology, Inc. All rights reserved.
Operations